Lines Matching refs:stack_offset
218 %assign stack_offset stack_offset+gprsize
223 %assign stack_offset stack_offset-gprsize
229 %assign stack_offset stack_offset+(%2)
236 %assign stack_offset stack_offset-(%2)
292 DECLARE_REG 4, rdi, edi, di, dil, [rsp + stack_offset + 40]
293 DECLARE_REG 5, rsi, esi, si, sil, [rsp + stack_offset + 48]
294 DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
295 %define r7m [rsp + stack_offset + 64]
296 %define r8m [rsp + stack_offset + 72]
300 mov r%1, [rsp + stack_offset + 8 + %1*8]
311 %assign stack_offset stack_offset+16
325 %assign stack_offset stack_offset+(xmm_regs_used-6)*16+16
347 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
376 DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 8]
377 %define r7m [rsp + stack_offset + 16]
378 %define r8m [rsp + stack_offset + 24]
407 DECLARE_REG 0, esi, esi, si, null, [esp + stack_offset + 4]
408 DECLARE_REG 1, edi, edi, di, null, [esp + stack_offset + 8]
409 DECLARE_REG 2, ecx, ecx, cx, cl, [esp + stack_offset + 12]
410 DECLARE_REG 3, edx, edx, dx, dl, [esp + stack_offset + 16]
411 DECLARE_REG 4, eax, eax, ax, al, [esp + stack_offset + 20]
412 DECLARE_REG 5, ebx, ebx, bx, bl, [esp + stack_offset + 24]
414 DECLARE_REG 0, eax, eax, ax, al, [esp + stack_offset + 4]
415 DECLARE_REG 1, ecx, ecx, cx, cl, [esp + stack_offset + 8]
416 DECLARE_REG 2, edx, edx, dx, dl, [esp + stack_offset + 12]
417 DECLARE_REG 3, ebx, ebx, bx, bl, [esp + stack_offset + 16]
418 DECLARE_REG 4, esi, esi, si, null, [esp + stack_offset + 20]
419 DECLARE_REG 5, edi, edi, di, null, [esp + stack_offset + 24]
422 DECLARE_REG 6, ebp, ebp, bp, null, [esp + stack_offset + 28]
423 %define r7m [esp + stack_offset + 32]
424 %define r8m [esp + stack_offset + 36]
430 %assign stack_offset stack_offset+4
442 mov r%1, [esp + stack_offset + 4 + %1*4]
521 %assign stack_offset 0
