Lines Matching refs:Ra
1422 const Register& ra,
1424 Emit(SF(rd) | op | Rm(rm) | Ra(ra) | Rn(rn) | Rd(rd));
1440 const Register& ra) {
1441 DCHECK(AreSameSizeAndType(rd, rn, rm, ra));
1442 DataProcessing3Source(rd, rn, rm, ra, MADD);
1458 const Register& ra) {
1459 DCHECK(AreSameSizeAndType(rd, rn, rm, ra));
1460 DataProcessing3Source(rd, rn, rm, ra, MSUB);
1467 const Register& ra) {
1468 DCHECK(rd.Is64Bits() && ra.Is64Bits());
1470 DataProcessing3Source(rd, rn, rm, ra, SMADDL_x);
1477 const Register& ra) {
1478 DCHECK(rd.Is64Bits() && ra.Is64Bits());
1480 DataProcessing3Source(rd, rn, rm, ra, SMSUBL_x);
1487 const Register& ra) {
1488 DCHECK(rd.Is64Bits() && ra.Is64Bits());
1490 DataProcessing3Source(rd, rn, rm, ra, UMADDL_x);
1497 const Register& ra) {
1498 DCHECK(rd.Is64Bits() && ra.Is64Bits());
1500 DataProcessing3Source(rd, rn, rm, ra, UMSUBL_x);
2358 Emit(FPType(fd) | op | Rm(fm) | Rn(fn) | Rd(fd) | Ra(fa));
