Lines Matching refs:fn
1789 void Assembler::fmov(Register rd, FPRegister fn) {
1790 DCHECK(rd.SizeInBits() == fn.SizeInBits());
1792 Emit(op | Rd(rd) | Rn(fn));
1803 void Assembler::fmov(FPRegister fd, FPRegister fn) {
1804 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1805 Emit(FPType(fd) | FMOV | Rd(fd) | Rn(fn));
1810 const FPRegister& fn,
1812 FPDataProcessing2Source(fd, fn, fm, FADD);
1817 const FPRegister& fn,
1819 FPDataProcessing2Source(fd, fn, fm, FSUB);
1824 const FPRegister& fn,
1826 FPDataProcessing2Source(fd, fn, fm, FMUL);
1831 const FPRegister& fn,
1834 FPDataProcessing3Source(fd, fn, fm, fa, fd.Is32Bits() ? FMADD_s : FMADD_d);
1839 const FPRegister& fn,
1842 FPDataProcessing3Source(fd, fn, fm, fa, fd.Is32Bits() ? FMSUB_s : FMSUB_d);
1847 const FPRegister& fn,
1850 FPDataProcessing3Source(fd, fn, fm, fa, fd.Is32Bits() ? FNMADD_s : FNMADD_d);
1855 const FPRegister& fn,
1858 FPDataProcessing3Source(fd, fn, fm, fa, fd.Is32Bits() ? FNMSUB_s : FNMSUB_d);
1863 const FPRegister& fn,
1865 FPDataProcessing2Source(fd, fn, fm, FDIV);
1870 const FPRegister& fn,
1872 FPDataProcessing2Source(fd, fn, fm, FMAX);
1877 const FPRegister& fn,
1879 FPDataProcessing2Source(fd, fn, fm, FMAXNM);
1884 const FPRegister& fn,
1886 FPDataProcessing2Source(fd, fn, fm, FMIN);
1891 const FPRegister& fn,
1893 FPDataProcessing2Source(fd, fn, fm, FMINNM);
1898 const FPRegister& fn) {
1899 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1900 FPDataProcessing1Source(fd, fn, FABS);
1905 const FPRegister& fn) {
1906 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1907 FPDataProcessing1Source(fd, fn, FNEG);
1912 const FPRegister& fn) {
1913 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1914 FPDataProcessing1Source(fd, fn, FSQRT);
1919 const FPRegister& fn) {
1920 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1921 FPDataProcessing1Source(fd, fn, FRINTA);
1926 const FPRegister& fn) {
1927 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1928 FPDataProcessing1Source(fd, fn, FRINTM);
1933 const FPRegister& fn) {
1934 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1935 FPDataProcessing1Source(fd, fn, FRINTN);
1940 const FPRegister& fn) {
1941 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1942 FPDataProcessing1Source(fd, fn, FRINTZ);
1946 void Assembler::fcmp(const FPRegister& fn,
1948 DCHECK(fn.SizeInBits() == fm.SizeInBits());
1949 Emit(FPType(fn) | FCMP | Rm(fm) | Rn(fn));
1953 void Assembler::fcmp(const FPRegister& fn,
1960 Emit(FPType(fn) | FCMP_zero | Rn(fn));
1964 void Assembler::fccmp(const FPRegister& fn,
1968 DCHECK(fn.SizeInBits() == fm.SizeInBits());
1969 Emit(FPType(fn) | FCCMP | Rm(fm) | Cond(cond) | Rn(fn) | Nzcv(nzcv));
1974 const FPRegister& fn,
1977 DCHECK(fd.SizeInBits() == fn.SizeInBits());
1979 Emit(FPType(fd) | FCSEL | Rm(fm) | Cond(cond) | Rn(fn) | Rd(fd));
1984 const FPRegister& fn,
1986 Emit(SF(rd) | FPType(fn) | op | Rn(fn) | Rd(rd));
1991 const FPRegister& fn) {
1994 DCHECK(fn.Is32Bits());
1995 FPDataProcessing1Source(fd, fn, FCVT_ds);
1998 DCHECK(fn.Is64Bits());
1999 FPDataProcessing1Source(fd, fn, FCVT_sd);
2004 void Assembler::fcvtau(const Register& rd, const FPRegister& fn) {
2005 FPConvertToInt(rd, fn, FCVTAU);
2009 void Assembler::fcvtas(const Register& rd, const FPRegister& fn) {
2010 FPConvertToInt(rd, fn, FCVTAS);
2014 void Assembler::fcvtmu(const Register& rd, const FPRegister& fn) {
2015 FPConvertToInt(rd, fn, FCVTMU);
2019 void Assembler::fcvtms(const Register& rd, const FPRegister& fn) {
2020 FPConvertToInt(rd, fn, FCVTMS);
2024 void Assembler::fcvtnu(const Register& rd, const FPRegister& fn) {
2025 FPConvertToInt(rd, fn, FCVTNU);
2029 void Assembler::fcvtns(const Register& rd, const FPRegister& fn) {
2030 FPConvertToInt(rd, fn, FCVTNS);
2034 void Assembler::fcvtzu(const Register& rd, const FPRegister& fn) {
2035 FPConvertToInt(rd, fn, FCVTZU);
2039 void Assembler::fcvtzs(const Register& rd, const FPRegister& fn) {
2040 FPConvertToInt(rd, fn, FCVTZS);
2336 const FPRegister& fn,
2338 Emit(FPType(fn) | op | Rn(fn) | Rd(fd));
2343 const FPRegister& fn,
2346 DCHECK(fd.SizeInBits() == fn.SizeInBits());
2348 Emit(FPType(fd) | op | Rm(fm) | Rn(fn) | Rd(fd));
2353 const FPRegister& fn,
2357 DCHECK(AreSameSizeAndType(fd, fn, fm, fa));
2358 Emit(FPType(fd) | op | Rm(fm) | Rn(fn) | Rd(fd) | Ra(fa));
