Lines Matching refs:Operand
57 const Operand& operand,
61 if (operand.NeedsRelocation(this)) {
63 Ldr(temp, operand.immediate());
66 } else if (operand.IsImmediate()) {
67 int64_t immediate = operand.ImmediateValue();
129 Operand imm_operand = MoveImmediateForShiftedOp(temp, immediate);
141 } else if (operand.IsExtendedRegister()) {
142 DCHECK(operand.reg().SizeInBits() <= rd.SizeInBits());
145 DCHECK(operand.shift_amount() <= 4);
146 DCHECK(operand.reg().Is64Bits() ||
147 ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
149 EmitExtendShift(temp, operand.reg(), operand.extend(),
150 operand.shift_amount());
154 // The operand can be encoded in the instruction.
155 DCHECK(operand.IsShiftedRegister());
156 Logical(rd, rn, operand, op);
241 const Operand& operand,
251 if (operand.NeedsRelocation(this)) {
252 Ldr(dst, operand.immediate());
254 } else if (operand.IsImmediate()) {
256 Mov(dst, operand.ImmediateValue());
258 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
262 EmitShift(dst, operand.reg(), operand.shift(), operand.shift_amount());
264 } else if (operand.IsExtendedRegister()) {
267 EmitExtendShift(dst, operand.reg(), operand.extend(),
268 operand.shift_amount());
279 // If csp is an operand, add #0 is emitted, otherwise, orr #0.
280 if (!rd.Is(operand.reg()) || (rd.Is32Bits() &&
282 Assembler::mov(rd, operand.reg());
296 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) {
299 if (operand.NeedsRelocation(this)) {
300 Ldr(rd, operand.immediate());
303 } else if (operand.IsImmediate()) {
305 Mov(rd, ~operand.ImmediateValue());
307 } else if (operand.IsExtendedRegister()) {
310 EmitExtendShift(rd, operand.reg(), operand.extend(),
311 operand.shift_amount());
315 mvn(rd, operand);
349 const Operand& operand,
354 if (operand.NeedsRelocation(this)) {
357 Ldr(temp, operand.immediate());
360 } else if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) ||
361 (operand.IsImmediate() &&
362 IsImmConditionalCompare(operand.ImmediateValue()))) {
363 // The immediate can be encoded in the instruction, or the operand is an
365 ConditionalCompare(rn, operand, nzcv, cond, op);
368 // The operand isn't directly supported by the instruction: perform the
372 Mov(temp, operand);
380 const Operand& operand,
385 if (operand.IsImmediate()) {
388 int64_t imm = operand.ImmediateValue();
402 } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) {
404 csel(rd, rn, operand.reg(), cond);
409 Mov(temp, operand);
438 Operand MacroAssembler::MoveImmediateForShiftedOp(const Register& dst,
460 // return a new leftward-shifting operand.
461 return Operand(dst, LSL, shift_low);
464 // return a new rightward-shifting operand.
465 return Operand(dst, LSR, shift_high);
471 return Operand(dst);
477 const Operand& operand,
480 operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() &&
481 !operand.NeedsRelocation(this) && (S == LeaveFlags)) {
486 if (operand.NeedsRelocation(this)) {
489 Ldr(temp, operand.immediate());
491 } else if ((operand.IsImmediate() &&
492 !IsImmAddSub(operand.ImmediateValue())) ||
493 (rn.IsZero() && !operand.IsShiftedRegister()) ||
494 (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
497 if (operand.IsImmediate()) {
498 Operand imm_operand =
499 MoveImmediateForShiftedOp(temp, operand.ImmediateValue());
502 Mov(temp, operand);
506 AddSub(rd, rn, operand, S, op);
513 const Operand& operand,
519 if (operand.NeedsRelocation(this)) {
521 Ldr(temp, operand.immediate());
524 } else if (operand.IsImmediate() ||
525 (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
528 Mov(temp, operand);
531 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
533 DCHECK(operand.reg().SizeInBits() == rd.SizeInBits());
534 DCHECK(operand.shift() != ROR);
535 DCHECK(is_uintn(operand.shift_amount(),
539 EmitShift(temp, operand.reg(), operand.shift(), operand.shift_amount());
542 } else if (operand.IsExtendedRegister()) {
544 DCHECK(operand.reg().SizeInBits() <= rd.SizeInBits());
547 DCHECK(operand.shift_amount() <= 4);
548 DCHECK(operand.reg().Is64Bits() ||
549 ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
551 EmitExtendShift(temp, operand.reg(), operand.extend(),
552 operand.shift_amount());
557 AddSubWithCarry(rd, rn, operand, S, op);
1051 PushPreamble(Operand(count, UXTW, WhichPowerOf2(src.SizeInBytes())));
1177 void MacroAssembler::PushPreamble(Operand total_size) {
1197 void MacroAssembler::PopPostamble(Operand total_size) {
1217 void MacroAssembler::Poke(const CPURegister& src, const Operand& offset) {
1229 void MacroAssembler::Peek(const CPURegister& dst, const Operand& offset) {
1423 Mov(result, Operand(cell));
1426 Mov(result, Operand(object));
1535 Operand(isolate()->factory()->allocation_memento_map()));
1555 Add(scratch1, scratch1, Operand::UntagSmi(scratch2));
1590 Mov(scratch1, Operand(ExternalReference(Isolate::kHandlerAddress,
1632 Mov(scratch1, Operand(ExternalReference(Isolate::kHandlerAddress,
2100 Mov(temp, Operand(target, rmode));
2326 Operand(scratch1, LSL, kPointerSizeLog2 + 1));
2339 And(scratch, mask, Operand::UntagSmi(object));
2343 Operand(scratch, LSL, kPointerSizeLog2 + 1));
2406 Cmp(input.W(), Operand(input.W(), UXTB));
2662 Sub(field_ptr, dst, Operand(field_ptr, LSL, kPointerSizeLog2));
2811 Operand actual_op = actual.is_immediate() ? Operand(actual.immediate())
2812 : Operand(actual.reg());
2824 Mov(x3, Operand(code_constant));
3075 Mov(code_reg, Operand(CodeObject()));
3125 Mov(scratch, Operand(CodeObject()));
3141 Mov(scratch, Operand(ExternalReference(Isolate::kCEntryFPAddress,
3144 Mov(scratch, Operand(ExternalReference(Isolate::kContextAddress,
3200 Mov(scratch, Operand(ExternalReference(Isolate::kContextAddress,
3207 Mov(scratch, Operand(ExternalReference(Isolate::kContextAddress,
3212 Mov(scratch, Operand(ExternalReference(Isolate::kCEntryFPAddress,
3299 Mov(x10, Operand(CodeObject()));
3372 Mov(top_address, Operand(heap_allocation_top));
3465 Adds(scratch3, result, Operand(object_size, LSL, kPointerSizeLog2));
3740 Cmp(obj_map, Operand(map));
3794 Cmp(scratch, Operand(map));
3904 const Operand& rhs,
3965 Cmp(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
3968 Operand(Map::kMaximumBitField2FastHoleyElementValue), CFlag, hi);
4003 Operand::UntagSmiAndScale(key_reg, kDoubleSizeLog2));
4051 Cmp(index, index_type == kIndexIsSmi ? scratch : Operand::UntagSmi(scratch));
4133 Eor(key, key, Operand::UntagSmi(scratch));
4144 Add(key, scratch, Operand(key, LSL, 15));
4146 Eor(key, key, Operand(key, LSR, 12));
4148 Add(key, key, Operand(key, LSL, 2));
4150 Eor(key, key, Operand(key, LSR, 4));
4152 Mov(scratch, Operand(key, LSL, 11));
4153 Add(key, key, Operand(key, LSL, 3));
4156 Eor(key, key, Operand(key, LSR, 16));
4193 Add(scratch2, scratch2, Operand(scratch2, LSL, 1));
4196 Add(scratch2, elements, Operand(scratch2, LSL, kPointerSizeLog2));
4398 Mov(value, Operand(bit_cast<int64_t>(kZapValue + 4)));
4399 Mov(scratch, Operand(bit_cast<int64_t>(kZapValue + 8)));
4470 Mov(dst, Operand(bit_cast<int64_t>(kZapValue + 12)));
4471 Mov(map, Operand(bit_cast<int64_t>(kZapValue + 16)));
4543 Mov(address, Operand(bit_cast<int64_t>(kZapValue + 12)));
4544 Mov(value, Operand(bit_cast<int64_t>(kZapValue + 16)));
4578 Add(bitmap_reg, bitmap_reg, Operand(temp, LSL, Bitmap::kBytesPerCellLog2));
4633 Mov(scratch, Operand(map));
4669 CompareAndBranch(current, Operand(factory->null_value()), ne, &loop_again);
4687 Add(result, ldr_location, Operand(result, LSL, kWordSizeInBytesLog2));
5298 Add(result, result, Operand(dividend, LSR, 31));
