Lines Matching defs:lui
183 // specially coded on MIPS means that it is a lui/ori instruction, and that is
547 return opcode == LUI;
1903 void Assembler::lui(Register rd, int32_t j) {
1905 GenInstrImmediate(LUI, zero_reg, rd, j);
1910 // This instruction uses same opcode as 'lui'. The difference in encoding is
1911 // 'lui' has zero reg. for rs field.
1913 GenInstrImmediate(LUI, rs, rt, j);
2773 lui(at, (imm64 >> 32) & kImm16Mask);
2806 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) &&
2834 // 0: lui(rd, (j.imm64_ >> 32) & kImm16Mask);
2839 // Patching the address must replace all the lui & ori instructions,
2862 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI &&
2867 // lui rt, upper-16.
2871 *p = LUI | (rt_code << kRtShift) | ((itarget >> 32) & kImm16Mask);
2884 // Address pc points to lui/ori instructions.
2895 DCHECK(GetOpcodeField(instr1) == LUI);
2903 DCHECK(GetOpcodeField(instr1) == LUI);
