Lines Matching refs:FVal
1227 SDValue FVal = Sel.getOperand(3);
1234 ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal);
1244 std::swap(TVal, FVal);
1254 FVal = Other;
1258 return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal,
1313 SDValue FVal = DAG.getConstant(0, MVT::i32);
1319 Overflow = DAG.getNode(AArch64ISD::CSEL, SDLoc(Op), MVT::i32, FVal, TVal,
3089 SDValue FVal = DAG.getConstant(0, VT);
3112 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp);
3131 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp);
3141 DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);
3177 SDValue FVal = Op->getOperand(2);
3195 return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal,
3200 return DAG.getSelectCC(DL, CC.getOperand(0), CC.getOperand(1), TVal, FVal,
3204 FVal, ISD::SETNE);
3213 SDValue FVal = Op.getOperand(3);
3236 // If both the TVal and the FVal are constants, see if we can swap them in
3238 ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal);
3242 std::swap(TVal, FVal);
3246 std::swap(TVal, FVal);
3250 // If TVal is a NOT we want to swap TVal and FVal so that we can match
3255 std::swap(TVal, FVal);
3260 // If TVal is a negation (SUB from 0) we want to swap TVal and FVal so
3265 std::swap(TVal, FVal);
3274 // If both TVal and FVal are constants, see if FVal is the
3306 // Swap TVal and FVal if necessary.
3308 std::swap(TVal, FVal);
3314 // Drop FVal since we can get its value by simply inverting/negating
3316 FVal = TVal;
3324 return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp);
3337 SDValue MinMaxLHS = TVal, MinMaxRHS = FVal;
3378 SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);
