Lines Matching refs:Lane
4613 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, MVT::i64);
4614 return DAG.getNode(Opcode, dl, VT, OpLHS, Lane);
4737 int Lane = SVN->getSplatIndex();
4739 if (Lane == -1)
4740 Lane = 0;
4742 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR)
4745 // Test if V1 is a BUILD_VECTOR and the lane being referenced is a non-
4746 // constant. If so, we can just reference the lane's definition directly.
4748 !isa<ConstantSDNode>(V1.getOperand(Lane)))
4749 return DAG.getNode(AArch64ISD::DUP, dl, VT, V1.getOperand(Lane));
4751 // Otherwise, duplicate from the lane of the input vector.
4758 Lane += cast<ConstantSDNode>(V1.getOperand(1))->getZExtValue();
4761 unsigned Idx = Lane >= (int)VT.getVectorNumElements() / 2;
4762 Lane -= Idx * VT.getVectorNumElements() / 2;
4767 return DAG.getNode(Opcode, dl, VT, V1, DAG.getConstant(Lane, MVT::i64));
5202 SDValue Lane = Op.getOperand(I);
5203 if (Lane.getOpcode() == ISD::Constant) {
5205 cast<ConstantSDNode>(Lane)->getZExtValue());
5206 Lane = DAG.getConstant(LowBits.getZExtValue(), MVT::i32);
5208 Ops.push_back(Lane);
5493 SDValue Lane = Value.getOperand(1);
5499 return DAG.getNode(Opcode, dl, VT, Value, Lane);
5516 // If there was only one constant value used and for more than one lane,
5519 // for each lane.
5559 // For 32 and 64 bit types, use INSERT_SUBREG for lane zero to
5589 // Check for non-constant lane.
5621 // Check for non-constant lane.
6622 // The dsub reference is equivalent to a lane zero subvector reference.
6708 // Transform a scalar conversion of a value from a lane extract into a
6709 // lane extract of a vector conversion. E.g., from foo1 to foo2:
6715 // coalescable due to a lane reference.
6717 // Check the operand and see if it originates from a lane extract.
6724 SDValue Lane = Op1.getOperand(1);
6743 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResTy, Convert, Lane);
6762 // We can handle most types of duplicate, but the lane ones have an extra
6763 // operand saying *which* lane, so we need to know.
7359 /// Target-specific DAG combine function for post-increment LD1 (lane) and
7425 Ops.push_back(N->getOperand(2)); // The lane to be inserted in the vector
7546 // Load lane and store have vector list as input.
7687 // First perform a vector comparison, where lane 0 is the one we're interested
