Lines Matching refs:MIB
217 const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
219 const MachineInstrBuilder &MIB,
265 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
266 MachineInstr *MI = &*MIB;
272 AddDefaultPred(MIB);
279 AddDefaultT1CC(MIB);
281 AddDefaultCC(MIB);
283 return MIB;
631 MachineInstrBuilder MIB;
634 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
637 MIB.addImm(Id);
638 AddOptionalDefs(MIB);
642 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
646 AddOptionalDefs(MIB);
652 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
656 AddOptionalDefs(MIB);
663 MachineInstrBuilder MIB;
666 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
671 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
676 AddOptionalDefs(MIB);
911 const MachineInstrBuilder &MIB,
929 MIB.addFrameIndex(FI);
935 MIB.addReg(0);
936 MIB.addImm(Imm);
938 MIB.addImm(Addr.Offset);
940 MIB.addMemOperand(MMO);
943 MIB.addReg(Addr.Base.Reg);
949 MIB.addReg(0);
950 MIB.addImm(Imm);
952 MIB.addImm(Addr.Offset);
955 AddOptionalDefs(MIB);
1044 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
1046 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOLoad, useAM3);
1166 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
1169 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOStore, useAM3);
1461 MachineInstrBuilder MIB;
1462 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
1467 MIB.addImm(Imm);
1468 AddOptionalDefs(MIB);
2146 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2148 AddOptionalDefs(MIB);
2150 MIB.addReg(RetRegs[i], RegState::Implicit);
2244 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2248 AddDefaultPred(MIB);
2250 MIB.addReg(CalleeReg);
2252 MIB.addExternalSymbol(TLI.getLibcallName(Call));
2256 MIB.addReg(RegArgs[i], RegState::Implicit);
2260 MIB.addRegMask(TRI.getCallPreservedMask(CC));
2267 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2385 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2397 AddDefaultPred(MIB);
2399 MIB.addReg(CalleeReg);
2401 MIB.addGlobalAddress(GV, 0, OpFlags);
2403 MIB.addExternalSymbol(IntrMemName, OpFlags);
2407 MIB.addReg(RegArgs[i], RegState::Implicit);
2411 MIB.addRegMask(TRI.getCallPreservedMask(CC));
2419 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2712 MachineInstrBuilder MIB = BuildMI(
2715 MIB.addReg(ARM::CPSR, RegState::Define);
2717 AddDefaultPred(MIB.addReg(SrcReg, isKill * RegState::Kill).addImm(ImmEnc));
2719 AddDefaultCC(MIB);
2791 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2796 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm));
2798 MIB.addReg(Reg2);
2799 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0));
2802 AddOptionalDefs(MIB);
2975 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2980 MIB.addImm(0);
2981 AddOptionalDefs(MIB);
