Lines Matching refs:QII
276 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
278 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i),
292 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
293 assert((QII->isExtended(MI) || QII->isConstExtended(MI)) &&
296 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i),
306 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
308 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i),
326 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
335 if (QII->isDeallocRet(MI)) {
406 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
407 if ( isCondInst(MI) || QII->mayBeNewStore(MI))
414 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
419 || QII->isConditionalTransfer(MI)
420 || QII->isConditionalALU32(MI)
421 || QII->isConditionalLoad(MI)
422 || QII->isConditionalStore(MI)) {
437 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
441 NewOpcode = QII->GetDotNewPredOp(MI, MBPI);
443 NewOpcode = QII->GetDotNewOp(MI);
444 MI->setDesc(QII->get(NewOpcode));
450 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
451 int NewOpcode = QII->GetDotOldOp(MI->getOpcode());
452 MI->setDesc(QII->get(NewOpcode));
465 const HexagonInstrInfo *QII) {
466 if (!QII->isPredicated(MI))
469 if (QII->isPredicatedTrue(MI))
476 const HexagonInstrInfo *QII) {
477 assert(QII->isPostIncrement(MI) && "Not a post increment operation.");
542 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
544 if (!QII->mayBeNewStore(MI))
557 const TargetRegisterClass* PacketRC = QII->getRegClass(MCID, 0, QRI, MF);
581 if (QII->isPostIncrement(MI) &&
583 GetPostIncrementOperand(MI, QII).getReg() == DepReg) {
587 if (QII->isPostIncrement(PacketMI) &&
589 GetPostIncrementOperand(PacketMI, QII).getReg() == DepReg) {
600 if (QII->isPredicated(PacketMI)) {
601 if (!QII->isPredicated(MI))
644 QII->isDotNewInst(PacketMI) != QII->isDotNewInst(MI) ||
645 getPredicateSense(MI, QII) != getPredicateSense(PacketMI, QII)) {
691 if (!QII->isPostIncrement(MI) &&
726 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
730 !QII->mayBeNewStore(MI))
755 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
757 if (QII->isDotNewInst(MI) && !QII->mayBeNewStore(MI))
767 !QII->mayBeNewStore(MI)) // MI is not a new-value store
772 int NewOpcode = QII->GetDotNewOp(MI);
773 const MCInstrDesc &desc = QII->get(NewOpcode);
810 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
817 if(!QII->isPredicated(*VIN)) continue;
843 const HexagonInstrInfo *QII) {
847 assert(QII->isPredicated(MI) && "Must be predicated instruction");
867 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
871 if (getPredicateSense(MI1, QII) == PK_Unknown ||
872 getPredicateSense(MI2, QII) == PK_Unknown)
935 unsigned PReg1 = getPredicatedRegister(MI1, QII);
936 unsigned PReg2 = getPredicatedRegister(MI2, QII);
940 (getPredicateSense(MI1, QII) != getPredicateSense(MI2, QII)) &&
941 (QII->isDotNewInst(MI1) == QII->isDotNewInst(MI2)));
1012 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
1023 if ((QII->isSaveCalleeSavedRegsCall(I) &&
1025 (QII->isSaveCalleeSavedRegsCall(J) &&
1039 (IsDirectJump(J) || MCIDJ.isCall() || QII->isDeallocRet(J))) {
1044 (IsDirectJump(I) || MCIDI.isCall() || QII->isDeallocRet(I))) {
1051 if (QII->isDeallocRet(I) &&
1064 (QII->isNewValueInst(J) || QII->isMemOp(J) || QII->isMemOp(I))) {
1069 if ((QII->isMemOp(J) && MCIDI.mayStore())
1070 || (MCIDJ.mayStore() && QII->isMemOp(I))
1071 || (QII->isMemOp(J) && QII->isMemOp(I))) {
1077 if (MCIDJ.mayStore() && QII->isDeallocRet(I)) {
1085 if (NextMII != I->getParent()->end() && QII->isNewValueJump(NextMII)) {
1197 (QII->isNewValueJump(I))) {
1203 else if (QII->isPredicated(I) &&
1204 QII->isPredicated(J) &&
1291 && QII->isValidOffset(I->getOpcode(),
1357 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
1365 if ((QII->isExtended(MI) || QII->isConstExtended(MI)) &&
1381 (QII->isExtended(nvjMI)
1385 (!QII->isExtended(nvjMI) &&
1393 if (QII->isExtended(nvjMI))
1401 if ( (QII->isExtended(MI) || QII->isConstExtended(MI))
