Lines Matching defs:Insn
126 unsigned Insn,
165 unsigned Insn,
225 unsigned Insn,
249 unsigned Insn,
254 unsigned Insn,
258 static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn,
262 unsigned Insn,
267 unsigned Insn,
271 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
276 unsigned Insn,
281 unsigned Insn,
288 unsigned Insn,
293 unsigned Insn,
298 unsigned Insn,
302 static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn,
305 static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn,
311 static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
316 DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
321 DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
326 DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
331 DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
336 DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
341 DecodeBlezGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
398 static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
403 InsnType tmp = fieldFromInstruction(insn, 17, 5);
424 tmp = fieldFromInstruction(insn, 6, 5);
431 tmp = fieldFromInstruction(insn, 16, NSize);
434 tmp = fieldFromInstruction(insn, 11, 5);
444 static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn,
457 InsnType Rs = fieldFromInstruction(insn, 21, 5);
458 InsnType Rt = fieldFromInstruction(insn, 16, 5);
459 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
483 static DecodeStatus DecodeDaddiGroupBranch(MCInst &MI, InsnType insn,
496 InsnType Rs = fieldFromInstruction(insn, 21, 5);
497 InsnType Rt = fieldFromInstruction(insn, 16, 5);
498 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
522 static DecodeStatus DecodeBlezlGroupBranch(MCInst &MI, InsnType insn,
536 InsnType Rs = fieldFromInstruction(insn, 21, 5);
537 InsnType Rt = fieldFromInstruction(insn, 16, 5);
538 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
565 static DecodeStatus DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn,
581 InsnType Rs = fieldFromInstruction(insn, 21, 5);
582 InsnType Rt = fieldFromInstruction(insn, 16, 5);
583 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
609 static DecodeStatus DecodeBgtzGroupBranch(MCInst &MI, InsnType insn,
623 InsnType Rs = fieldFromInstruction(insn, 21, 5);
624 InsnType Rt = fieldFromInstruction(insn, 16, 5);
625 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
658 static DecodeStatus DecodeBlezGroupBranch(MCInst &MI, InsnType insn,
672 InsnType Rs = fieldFromInstruction(insn, 21, 5);
673 InsnType Rt = fieldFromInstruction(insn, 16, 5);
674 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) << 2;
704 uint32_t &insn,
717 insn = (Bytes[3] << 0) |
728 insn = (Bytes[2] << 0) |
733 insn = (Bytes[0] << 0) |
750 uint32_t Insn;
753 Insn, isBigEndian, IsMicroMips);
760 Result = decodeInstruction(DecoderTableMicroMips32, instr, Insn, Address,
772 decodeInstruction(DecoderTableCOP3_32, instr, Insn, Address, this, STI);
781 Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, instr, Insn,
791 Result = decodeInstruction(DecoderTableMips32r6_64r632, instr, Insn,
801 Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address,
818 uint32_t Insn;
821 Insn, isBigEndian, false);
826 Result = decodeInstruction(DecoderTableMips6432, instr, Insn, Address,
833 Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address,
963 unsigned Insn,
966 int Offset = SignExtend32<16>(Insn & 0xffff);
967 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
968 unsigned Base = fieldFromInstruction(Insn, 21, 5);
984 static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn,
986 int Offset = SignExtend32<10>(fieldFromInstruction(Insn, 16, 10));
987 unsigned Reg = fieldFromInstruction(Insn, 6, 5);
988 unsigned Base = fieldFromInstruction(Insn, 11, 5);
1031 unsigned Insn,
1034 int Offset = SignExtend32<12>(Insn & 0x0fff);
1035 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1036 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1052 unsigned Insn,
1055 int Offset = SignExtend32<16>(Insn & 0xffff);
1056 unsigned Reg = fieldFromInstruction(Insn, 21, 5);
1057 unsigned Base = fieldFromInstruction(Insn, 16, 5);
1070 unsigned Insn,
1073 int Offset = SignExtend32<16>(Insn & 0xffff);
1074 unsigned Reg = fieldFromInstruction(Insn, 16, 5);
1075 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1088 unsigned Insn,
1091 int64_t Offset = SignExtend64<9>((Insn >> 7) & 0x1ff);
1092 unsigned Rt = fieldFromInstruction(Insn, 16, 5);
1093 unsigned Base = fieldFromInstruction(Insn, 21, 5);
1251 unsigned Insn,
1255 unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 2;
1290 unsigned Insn,
1293 unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 1;
1299 unsigned Insn,
1302 Inst.addOperand(MCOperand::CreateImm(SignExtend32<16>(Insn)));
1307 unsigned Insn,
1311 Inst.addOperand(MCOperand::CreateImm(Insn + 1));
1316 unsigned Insn,
1321 int Size = (int) Insn - Pos + 1;
1327 unsigned Insn,
1330 int Size = (int) Insn + 1;
1335 static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn,
1337 Insn) << 2));
1341 static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn,
1343 Inst.addOperand(MCOperand::CreateImm(SignExtend32<18>(Insn) << 3));
