Lines Matching full:mips
1 //===- MipsDisassembler.cpp - Disassembler for Mips -------------*- C++ -*-===//
10 // This file is part of the Mips Disassembler.
14 #include "Mips.h"
28 #define DEBUG_TYPE "mips-disassembler"
34 /// MipsDisassemblerBase - a disasembler class for Mips.
42 IsN64(STI.getFeatureBits() & Mips::FeatureN64), isBigEndian(bigEndian) {}
62 IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips;
65 bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; }
66 bool hasMips32() const { return STI.getFeatureBits() & Mips::FeatureMips32; }
68 return STI.getFeatureBits() & Mips::FeatureMips32r6;
71 bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; }
74 // Only present in MIPS-I and MIPS-II
463 MI.setOpcode(Mips::BOVC);
466 MI.setOpcode(Mips::BEQC);
469 MI.setOpcode(Mips::BEQZALC);
472 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
475 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
502 MI.setOpcode(Mips::BNVC);
505 MI.setOpcode(Mips::BNEC);
508 MI.setOpcode(Mips::BNEZALC);
511 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
514 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
544 MI.setOpcode(Mips::BLEZC);
546 MI.setOpcode(Mips::BGEZC);
549 MI.setOpcode(Mips::BGEC);
553 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
556 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
588 MI.setOpcode(Mips::BGTZC);
590 MI.setOpcode(Mips::BLTZC);
592 MI.setOpcode(Mips::BLTC);
597 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
600 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
630 MI.setOpcode(Mips::BGTZ);
633 MI.setOpcode(Mips::BGTZALC);
636 MI.setOpcode(Mips::BLTZALC);
639 MI.setOpcode(Mips::BLTUC);
645 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
649 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
680 MI.setOpcode(Mips::BLEZALC);
682 MI.setOpcode(Mips::BGEZALC);
685 MI.setOpcode(Mips::BGEUC);
689 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
691 MI.addOperand(MCOperand::CreateReg(getReg(Decoder, Mips::GPR32RegClassID,
799 DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n");
860 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo);
871 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo);
900 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo);
912 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo);
924 unsigned Reg = getReg(Decoder, Mips::FGRH32RegClassID, RegNo);
935 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo);
946 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo);
957 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo);
970 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
971 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
973 if(Inst.getOpcode() == Mips::SC){
990 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg);
991 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1009 case Mips::LD_B:
1010 case Mips::ST_B:
1013 case Mips::LD_H:
1014 case Mips::ST_H:
1017 case Mips::LD_W:
1018 case Mips::ST_W:
1021 case Mips::LD_D:
1022 case Mips::ST_D:
1038 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1039 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1041 if (Inst.getOpcode() == Mips::SC_MM)
1059 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1060 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1077 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1078 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1095 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt);
1096 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1098 if(Inst.getOpcode() == Mips::SC_R6 || Inst.getOpcode() == Mips::SCD_R6){
1116 Inst.addOperand(MCOperand::CreateReg(Mips::HWR29));
1128 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2);
1140 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo);
1152 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo);
1164 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo);
1176 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo);
1188 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo);
1200 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo);
1212 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo);
1224 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo);
1236 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo);
