Lines Matching refs:Lane
1374 // When ResVecTy == MVT::v2i64, LaneA is the upper 32 bits of the lane and
2870 // for lane 1 because it would require FR=0 mode which isn't supported by MSA.
2878 unsigned Lane = MI->getOperand(2).getImm();
2880 if (Lane == 0)
2885 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane);
2911 unsigned Lane = MI->getOperand(2).getImm() * 2;
2914 if (Lane == 0)
2941 unsigned Lane = MI->getOperand(2).getImm();
2951 .addImm(Lane)
2975 unsigned Lane = MI->getOperand(2).getImm();
2985 .addImm(Lane)
2998 // (SLL $lanetmp1, $lane, <log2size)
3008 // (SLL $lanetmp1, $lane, <log2size)
3070 // Convert the lane index into a byte index
3079 // Rotate bytes around so that the desired lane is element zero
3104 // the lane index to do this.
