Lines Matching refs:SRW
6389 // srw dest, tmpDest, shift6440 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), dest).addReg(TmpDestReg)7006 // srw dest, tmpDest, shift7075 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg)
