Lines Matching refs:RLWINM
387 /// rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot.
418 // rlwinm rA, rA, ShiftBits, 0, 31.
419 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
463 // rlwinm r11, r11, 32-ShiftBits, 0, 31.
464 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
536 // rlwinm rA, rA, ShiftBits, 0, 0.
537 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)
