Lines Matching refs:X86
26 #include "X86.h"
47 #define DEBUG_TYPE "x86-codegen"
73 const char *getPassName() const override { return "X86 FP Stackifier"; }
120 if (Reg < X86::FP0 || Reg > X86::FP6)
122 Mask |= 1 << (Reg - X86::FP0);
215 /// getStackEntry - Return the X86::FP<n> register in register ST(i).
222 /// getSTReg - Return the X86::ST(i) register which contains the specified
225 return StackTop - 1 - getSlot(RegNo) + X86::ST0;
254 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);
263 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);
320 return X86::RFP80RegClass.contains(DstReg) ||
321 X86::RFP80RegClass.contains(SrcReg);
329 /// getFPReg - Return the X86::FPx register number for the specified operand.
330 /// For example, this returns 3 for X86::FP3.
334 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
335 return Reg - X86::FP0;
346 assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!");
348 if (MF.getRegInfo().isPhysRegUsed(X86::FP0+i)) {
428 X86::RFP80RegClass.contains(MI->getOperand(0).getReg()))
465 if (Reg >= X86::FP0 && Reg <= X86::FP6) {
466 DEBUG(dbgs() << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
467 freeStackSlotAfter(I, Reg-X86::FP0);
516 MBB->addLiveIn(X86::ST0+i-1);
623 // concrete X86 instruction which uses the register stack.
626 { X86::ABS_Fp32 , X86::ABS_F },
627 { X86::ABS_Fp64 , X86::ABS_F },
628 { X86::ABS_Fp80 , X86::ABS_F },
629 { X86::ADD_Fp32m , X86::ADD_F32m },
630 { X86::ADD_Fp64m , X86::ADD_F64m },
631 { X86::ADD_Fp64m32 , X86::ADD_F32m },
632 { X86::ADD_Fp80m32 , X86::ADD_F32m },
633 { X86::ADD_Fp80m64 , X86::ADD_F64m },
634 { X86::ADD_FpI16m32 , X86::ADD_FI16m },
635 { X86::ADD_FpI16m64 , X86::ADD_FI16m },
636 { X86::ADD_FpI16m80 , X86::ADD_FI16m },
637 { X86::ADD_FpI32m32 , X86::ADD_FI32m },
638 { X86::ADD_FpI32m64 , X86::ADD_FI32m },
639 { X86::ADD_FpI32m80 , X86::ADD_FI32m },
640 { X86::CHS_Fp32 , X86::CHS_F },
641 { X86::CHS_Fp64 , X86::CHS_F },
642 { X86::CHS_Fp80 , X86::CHS_F },
643 { X86::CMOVBE_Fp32 , X86::CMOVBE_F },
644 { X86::CMOVBE_Fp64 , X86::CMOVBE_F },
645 { X86::CMOVBE_Fp80 , X86::CMOVBE_F },
646 { X86::CMOVB_Fp32 , X86::CMOVB_F },
647 { X86::CMOVB_Fp64 , X86::CMOVB_F },
648 { X86::CMOVB_Fp80 , X86::CMOVB_F },
649 { X86::CMOVE_Fp32 , X86::CMOVE_F },
650 { X86::CMOVE_Fp64 , X86::CMOVE_F },
651 { X86::CMOVE_Fp80 , X86::CMOVE_F },
652 { X86::CMOVNBE_Fp32 , X86::CMOVNBE_F },
653 { X86::CMOVNBE_Fp64 , X86::CMOVNBE_F },
654 { X86::CMOVNBE_Fp80 , X86::CMOVNBE_F },
655 { X86::CMOVNB_Fp32 , X86::CMOVNB_F },
656 { X86::CMOVNB_Fp64 , X86::CMOVNB_F },
657 { X86::CMOVNB_Fp80 , X86::CMOVNB_F },
658 { X86::CMOVNE_Fp32 , X86::CMOVNE_F },
659 { X86::CMOVNE_Fp64 , X86::CMOVNE_F },
660 { X86::CMOVNE_Fp80 , X86::CMOVNE_F },
661 { X86::CMOVNP_Fp32 , X86::CMOVNP_F },
662 { X86::CMOVNP_Fp64 , X86::CMOVNP_F },
663 { X86::CMOVNP_Fp80 , X86::CMOVNP_F },
664 { X86::CMOVP_Fp32 , X86::CMOVP_F },
665 { X86::CMOVP_Fp64 , X86::CMOVP_F },
666 { X86::CMOVP_Fp80 , X86::CMOVP_F },
667 { X86::COS_Fp32 , X86::COS_F },
668 { X86::COS_Fp64 , X86::COS_F },
669 { X86::COS_Fp80 , X86::COS_F },
670 { X86::DIVR_Fp32m , X86::DIVR_F32m },
671 { X86::DIVR_Fp64m , X86::DIVR_F64m },
672 { X86::DIVR_Fp64m32 , X86::DIVR_F32m },
673 { X86::DIVR_Fp80m32 , X86::DIVR_F32m },
674 { X86::DIVR_Fp80m64 , X86::DIVR_F64m },
675 { X86::DIVR_FpI16m32, X86::DIVR_FI16m},
676 { X86::DIVR_FpI16m64, X86::DIVR_FI16m},
677 { X86::DIVR_FpI16m80, X86::DIVR_FI16m},
678 { X86::DIVR_FpI32m32, X86::DIVR_FI32m},
679 { X86::DIVR_FpI32m64, X86::DIVR_FI32m},
680 { X86::DIVR_FpI32m80, X86::DIVR_FI32m},
681 { X86::DIV_Fp32m , X86::DIV_F32m },
682 { X86::DIV_Fp64m , X86::DIV_F64m },
683 { X86::DIV_Fp64m32 , X86::DIV_F32m },
684 { X86::DIV_Fp80m32 , X86::DIV_F32m },
685 { X86::DIV_Fp80m64 , X86::DIV_F64m },
686 { X86::DIV_FpI16m32 , X86::DIV_FI16m },
687 { X86::DIV_FpI16m64 , X86::DIV_FI16m },
688 { X86::DIV_FpI16m80 , X86::DIV_FI16m },
689 { X86::DIV_FpI32m32 , X86::DIV_FI32m },
690 { X86::DIV_FpI32m64 , X86::DIV_FI32m },
691 { X86::DIV_FpI32m80 , X86::DIV_FI32m },
692 { X86::ILD_Fp16m32 , X86::ILD_F16m },
693 { X86::ILD_Fp16m64 , X86::ILD_F16m },
694 { X86::ILD_Fp16m80 , X86::ILD_F16m },
695 { X86::ILD_Fp32m32 , X86::ILD_F32m },
696 { X86::ILD_Fp32m64 , X86::ILD_F32m },
697 { X86::ILD_Fp32m80 , X86::ILD_F32m },
698 { X86::ILD_Fp64m32 , X86::ILD_F64m },
699 { X86::ILD_Fp64m64 , X86::ILD_F64m },
700 { X86::ILD_Fp64m80 , X86::ILD_F64m },
701 { X86::ISTT_Fp16m32 , X86::ISTT_FP16m},
702 { X86::ISTT_Fp16m64 , X86::ISTT_FP16m},
703 { X86::ISTT_Fp16m80 , X86::ISTT_FP16m},
704 { X86::ISTT_Fp32m32 , X86::ISTT_FP32m},
705 { X86::ISTT_Fp32m64 , X86::ISTT_FP32m},
706 { X86::ISTT_Fp32m80 , X86::ISTT_FP32m},
707 { X86::ISTT_Fp64m32 , X86::ISTT_FP64m},
708 { X86::ISTT_Fp64m64 , X86::ISTT_FP64m},
709 { X86::ISTT_Fp64m80 , X86::ISTT_FP64m},
710 { X86::IST_Fp16m32 , X86::IST_F16m },
711 { X86::IST_Fp16m64 , X86::IST_F16m },
712 { X86::IST_Fp16m80 , X86::IST_F16m },
713 { X86::IST_Fp32m32 , X86::IST_F32m },
714 { X86::IST_Fp32m64 , X86::IST_F32m },
715 { X86::IST_Fp32m80 , X86::IST_F32m },
716 { X86::IST_Fp64m32 , X86::IST_FP64m },
717 { X86::IST_Fp64m64 , X86::IST_FP64m },
718 { X86::IST_Fp64m80 , X86::IST_FP64m },
719 { X86::LD_Fp032 , X86::LD_F0 },
720 { X86::LD_Fp064 , X86::LD_F0 },
721 { X86::LD_Fp080 , X86::LD_F0 },
722 { X86::LD_Fp132 , X86::LD_F1 },
723 { X86::LD_Fp164 , X86::LD_F1 },
724 { X86::LD_Fp180 , X86::LD_F1 },
725 { X86::LD_Fp32m , X86::LD_F32m },
726 { X86::LD_Fp32m64 , X86::LD_F32m },
727 { X86::LD_Fp32m80 , X86::LD_F32m },
728 { X86::LD_Fp64m , X86::LD_F64m },
729 { X86::LD_Fp64m80 , X86::LD_F64m },
730 { X86::LD_Fp80m , X86::LD_F80m },
731 { X86::MUL_Fp32m , X86::MUL_F32m },
732 { X86::MUL_Fp64m , X86::MUL_F64m },
733 { X86::MUL_Fp64m32 , X86::MUL_F32m },
734 { X86::MUL_Fp80m32 , X86::MUL_F32m },
735 { X86::MUL_Fp80m64 , X86::MUL_F64m },
736 { X86::MUL_FpI16m32 , X86::MUL_FI16m },
737 { X86::MUL_FpI16m64 , X86::MUL_FI16m },
738 { X86::MUL_FpI16m80 , X86::MUL_FI16m },
739 { X86::MUL_FpI32m32 , X86::MUL_FI32m },
740 { X86::MUL_FpI32m64 , X86::MUL_FI32m },
741 { X86::MUL_FpI32m80 , X86::MUL_FI32m },
742 { X86::SIN_Fp32 , X86::SIN_F },
743 { X86::SIN_Fp64 , X86::SIN_F },
744 { X86::SIN_Fp80 , X86::SIN_F },
745 { X86::SQRT_Fp32 , X86::SQRT_F },
746 { X86::SQRT_Fp64 , X86::SQRT_F },
747 { X86::SQRT_Fp80 , X86::SQRT_F },
748 { X86::ST_Fp32m , X86::ST_F32m },
749 { X86::ST_Fp64m , X86::ST_F64m },
750 { X86::ST_Fp64m32 , X86::ST_F32m },
751 { X86::ST_Fp80m32 , X86::ST_F32m },
752 { X86::ST_Fp80m64 , X86::ST_F64m },
753 { X86::ST_FpP80m , X86::ST_FP80m },
754 { X86::SUBR_Fp32m , X86::SUBR_F32m },
755 { X86::SUBR_Fp64m , X86::SUBR_F64m },
756 { X86::SUBR_Fp64m32 , X86::SUBR_F32m },
757 { X86::SUBR_Fp80m32 , X86::SUBR_F32m },
758 { X86::SUBR_Fp80m64 , X86::SUBR_F64m },
759 { X86::SUBR_FpI16m32, X86::SUBR_FI16m},
760 { X86::SUBR_FpI16m64, X86::SUBR_FI16m},
761 { X86::SUBR_FpI16m80, X86::SUBR_FI16m},
762 { X86::SUBR_FpI32m32, X86::SUBR_FI32m},
763 { X86::SUBR_FpI32m64, X86::SUBR_FI32m},
764 { X86::SUBR_FpI32m80, X86::SUBR_FI32m},
765 { X86::SUB_Fp32m , X86::SUB_F32m },
766 { X86::SUB_Fp64m , X86::SUB_F64m },
767 { X86::SUB_Fp64m32 , X86::SUB_F32m },
768 { X86::SUB_Fp80m32 , X86::SUB_F32m },
769 { X86::SUB_Fp80m64 , X86::SUB_F64m },
770 { X86::SUB_FpI16m32 , X86::SUB_FI16m },
771 { X86::SUB_FpI16m64 , X86::SUB_FI16m },
772 { X86::SUB_FpI16m80 , X86::SUB_FI16m },
773 { X86::SUB_FpI32m32 , X86::SUB_FI32m },
774 { X86::SUB_FpI32m64 , X86::SUB_FI32m },
775 { X86::SUB_FpI32m80 , X86::SUB_FI32m },
776 { X86::TST_Fp32 , X86::TST_F },
777 { X86::TST_Fp64 , X86::TST_F },
778 { X86::TST_Fp80 , X86::TST_F },
779 { X86::UCOM_FpIr32 , X86::UCOM_FIr },
780 { X86::UCOM_FpIr64 , X86::UCOM_FIr },
781 { X86::UCOM_FpIr80 , X86::UCOM_FIr },
782 { X86::UCOM_Fpr32 , X86::UCOM_Fr },
783 { X86::UCOM_Fpr64 , X86::UCOM_Fr },
784 { X86::UCOM_Fpr80 , X86::UCOM_Fr },
802 { X86::ADD_FrST0 , X86::ADD_FPrST0 },
804 { X86::DIVR_FrST0, X86::DIVR_FPrST0 },
805 { X86::DIV_FrST0 , X86::DIV_FPrST0 },
807 { X86::IST_F16m , X86::IST_FP16m },
808 { X86::IST_F32m , X86::IST_FP32m },
810 { X86::MUL_FrST0 , X86::MUL_FPrST0 },
812 { X86::ST_F32m , X86::ST_FP32m },
813 { X86::ST_F64m , X86::ST_FP64m },
814 { X86::ST_Frr , X86::ST_FPrr },
816 { X86::SUBR_FrST0, X86::SUBR_FPrST0 },
817 { X86::SUB_FrST0 , X86::SUB_FPrST0 },
819 { X86::UCOM_FIr , X86::UCOM_FIPr },
821 { X86::UCOM_FPr , X86::UCOM_FPPr },
822 { X86::UCOM_Fr , X86::UCOM_FPr },
843 if (Opcode == X86::UCOM_FPPr)
846 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0);
877 return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr)).addReg(STReg);
932 BuildMI(*MBB, I, DebugLoc(), TII->get(X86::LD_F0));
988 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) &&
993 bool KillsSrc = MI->killsRegister(X86::FP0+Reg);
1005 (MI->getOpcode() == X86::IST_Fp64m32 ||
1006 MI->getOpcode() == X86::ISTT_Fp16m32 ||
1007 MI->getOpcode() == X86::ISTT_Fp32m32 ||
1008 MI->getOpcode() == X86::ISTT_Fp64m32 ||
1009 MI->getOpcode() == X86::IST_Fp64m64 ||
1010 MI->getOpcode() == X86::ISTT_Fp16m64 ||
1011 MI->getOpcode() == X86::ISTT_Fp32m64 ||
1012 MI->getOpcode() == X86::ISTT_Fp64m64 ||
1013 MI->getOpcode() == X86::IST_Fp64m80 ||
1014 MI->getOpcode() == X86::ISTT_Fp16m80 ||
1015 MI->getOpcode() == X86::ISTT_Fp32m80 ||
1016 MI->getOpcode() == X86::ISTT_Fp64m80 ||
1017 MI->getOpcode() == X86::ST_FpP80m)) {
1027 if (MI->getOpcode() == X86::IST_FP64m ||
1028 MI->getOpcode() == X86::ISTT_FP16m ||
1029 MI->getOpcode() == X86::ISTT_FP32m ||
1030 MI->getOpcode() == X86::ISTT_FP64m ||
1031 MI->getOpcode() == X86::ST_FP80m) {
1058 bool KillsSrc = MI->killsRegister(X86::FP0+Reg);
1088 { X86::ADD_Fp32 , X86::ADD_FST0r },
1089 { X86::ADD_Fp64 , X86::ADD_FST0r },
1090 { X86::ADD_Fp80 , X86::ADD_FST0r },
1091 { X86::DIV_Fp32 , X86::DIV_FST0r },
1092 { X86::DIV_Fp64 , X86::DIV_FST0r },
1093 { X86::DIV_Fp80 , X86::DIV_FST0r },
1094 { X86::MUL_Fp32 , X86::MUL_FST0r },
1095 { X86::MUL_Fp64 , X86::MUL_FST0r },
1096 { X86::MUL_Fp80 , X86::MUL_FST0r },
1097 { X86::SUB_Fp32 , X86::SUB_FST0r },
1098 { X86::SUB_Fp64 , X86::SUB_FST0r },
1099 { X86::SUB_Fp80 , X86::SUB_FST0r },
1104 { X86::ADD_Fp32 , X86::ADD_FST0r }, // commutative
1105 { X86::ADD_Fp64 , X86::ADD_FST0r }, // commutative
1106 { X86::ADD_Fp80 , X86::ADD_FST0r }, // commutative
1107 { X86::DIV_Fp32 , X86::DIVR_FST0r },
1108 { X86::DIV_Fp64 , X86::DIVR_FST0r },
1109 { X86::DIV_Fp80 , X86::DIVR_FST0r },
1110 { X86::MUL_Fp32 , X86::MUL_FST0r }, // commutative
1111 { X86::MUL_Fp64 , X86::MUL_FST0r }, // commutative
1112 { X86::MUL_Fp80 , X86::MUL_FST0r }, // commutative
1113 { X86::SUB_Fp32 , X86::SUBR_FST0r },
1114 { X86::SUB_Fp64 , X86::SUBR_FST0r },
1115 { X86::SUB_Fp80 , X86::SUBR_FST0r },
1120 { X86::ADD_Fp32 , X86::ADD_FrST0 }, // commutative
1121 { X86::ADD_Fp64 , X86::ADD_FrST0 }, // commutative
1122 { X86::ADD_Fp80 , X86::ADD_FrST0 }, // commutative
1123 { X86::DIV_Fp32 , X86::DIVR_FrST0 },
1124 { X86::DIV_Fp64 , X86::DIVR_FrST0 },
1125 { X86::DIV_Fp80 , X86::DIVR_FrST0 },
1126 { X86::MUL_Fp32 , X86::MUL_FrST0 }, // commutative
1127 { X86::MUL_Fp64 , X86::MUL_FrST0 }, // commutative
1128 { X86::MUL_Fp80 , X86::MUL_FrST0 }, // commutative
1129 { X86::SUB_Fp32 , X86::SUBR_FrST0 },
1130 { X86::SUB_Fp64 , X86::SUBR_FrST0 },
1131 { X86::SUB_Fp80 , X86::SUBR_FrST0 },
1136 { X86::ADD_Fp32 , X86::ADD_FrST0 },
1137 { X86::ADD_Fp64 , X86::ADD_FrST0 },
1138 { X86::ADD_Fp80 , X86::ADD_FrST0 },
1139 { X86::DIV_Fp32 , X86::DIV_FrST0 },
1140 { X86::DIV_Fp64 , X86::DIV_FrST0 },
1141 { X86::DIV_Fp80 , X86::DIV_FrST0 },
1142 { X86::MUL_Fp32 , X86::MUL_FrST0 },
1143 { X86::MUL_Fp64 , X86::MUL_FrST0 },
1144 { X86::MUL_Fp80 , X86::MUL_FrST0 },
1145 { X86::SUB_Fp32 , X86::SUB_FrST0 },
1146 { X86::SUB_Fp64 , X86::SUB_FrST0 },
1147 { X86::SUB_Fp80 , X86::SUB_FrST0 },
1169 bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);
1170 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1267 bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);
1268 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1293 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1325 unsigned DstST = MO0.getReg() - X86::ST0;
1326 unsigned SrcST = MO1.getReg() - X86::ST0;
1402 unsigned Reg = MI->getOperand(0).getReg() - X86::FP0;
1404 BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::LD_F0));
1409 case X86::FpPOP_RETVAL: {
1484 unsigned STReg = MO.getReg() - X86::ST0;
1537 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
1585 BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::LD_F0));
1600 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
1650 case X86::WIN_FTOL_32:
1651 case X86::WIN_FTOL_64: {
1655 Op.getReg() >= X86::FP0 && Op.getReg() <= X86::FP6);
1663 BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::CALLpcrel32))
1665 .addReg(X86::ST0, RegState::ImplicitKill)
1666 .addReg(X86::ECX, RegState::ImplicitDefine)
1667 .addReg(X86::EAX, RegState::Define | RegState::Implicit)
1668 .addReg(X86::EDX, RegState::Define | RegState::Implicit)
1669 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
1675 case X86::RETQ:
1676 case X86::RETL:
1677 case X86::RETIL:
1678 case X86::RETIQ:
1688 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
