Lines Matching refs:MOVSD
3379 case X86ISD::MOVSD:
3437 case X86ISD::MOVSD:
4262 /// MOVSD, and MOVD, i.e. setting the lowest element.
5163 case X86ISD::MOVSD: {
5165 // this is why MOVSS and MOVSD are used in the first place. The other
6602 // the rest of the elements. This will be matched as movd/movq/movss/movsd
6617 // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector.
8967 // potencial load folding here, otherwise use SHUFPS or MOVSD to match the
8999 // types are matched with movsd.
9004 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
9368 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
9895 // UNPCKHPD the element to the lowest double word, then movsd.
15600 // constant plus a MOVSS/MOVSD instead of scalarizing it.
15622 // two shifts followed by a MOVSS/MOVSD
15628 // Otherwise, check if we can still simplify this node using a MOVSD.
15631 TargetOpcode = X86ISD::MOVSD;
15642 TargetOpcode = X86ISD::MOVSD;
15654 // Replace this node with two shifts followed by a MOVSS/MOVSD.
15662 if (TargetOpcode == X86ISD::MOVSD)
16608 case X86ISD::MOVSD: return "X86ISD::MOVSD";
19643 // Try to fold this VSELECT into a MOVSS/MOVSD
19657 // fold (vselect <0,-1> -> (movsd A, B)
19665 // fold (vselect <-1,0> -> (movsd B, A)
19673 return getTargetShuffleNode(X86ISD::MOVSD, DL, VT, A, B, DAG);
19678 // (v4i32 (bitcast (movsd (v2i64 (bitcast A)),
19682 // (v4f32 (bitcast (movsd (v2f64 (bitcast A)),
19686 // (v4i32 (bitcast (movsd (v2i64 (bitcast B)),
19690 // (v4f32 (bitcast (movsd (v2f64 (bitcast B)),
19710 SDValue Select = getTargetShuffleNode(X86ISD::MOVSD, DL, NVT, NewA,
22020 case X86ISD::MOVSD:
