Lines Matching defs:Op2
254 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) {
267 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 0, 2);
272 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2,
282 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 2, 2);
360 unsigned Op1, Op2;
361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
366 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
373 unsigned Op1, Op2;
374 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
379 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
386 unsigned Op1, Op2;
387 DecodeStatus S = Decode2OpInstruction(Insn, Op2, Op1);
392 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
399 unsigned Op1, Op2;
400 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
406 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
413 unsigned Op1, Op2;
414 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
419 Inst.addOperand(MCOperand::CreateImm(Op2));
426 unsigned Op1, Op2;
427 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
432 DecodeBitpOperand(Inst, Op2, Address, Decoder);
439 unsigned Op1, Op2;
440 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
446 DecodeBitpOperand(Inst, Op2, Address, Decoder);
524 unsigned Op1, Op2;
526 Op1, Op2);
531 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
538 unsigned Op1, Op2;
540 Op1, Op2);
544 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
552 unsigned Op1, Op2, Op3;
553 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
556 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
565 unsigned Op1, Op2, Op3;
566 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
569 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
578 unsigned Op1, Op2, Op3;
579 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
582 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
591 unsigned Op1, Op2, Op3;
592 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
595 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
604 unsigned Op1, Op2, Op3;
606 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
609 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
618 unsigned Op1, Op2, Op3;
620 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
624 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
633 unsigned Op1, Op2, Op3;
635 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
638 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
647 unsigned Op1, Op2, Op3;
649 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
652 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
661 unsigned Op1, Op2, Op3, Op4, Op5, Op6;
663 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
671 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
695 unsigned Op1, Op2, Op3, Op4, Op5;
697 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
706 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
715 unsigned Op1, Op2, Op3;
718 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
725 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
734 unsigned Op1, Op2, Op3;
737 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
745 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
