Lines Matching full:lsl
9 # CHECK: add w30, w29, #1, lsl #12
10 # CHECK: add w13, w5, #4095, lsl #12
26 # CHECK: add x3, x24, #4095, lsl #12
35 # CHECK: sub w4, w20, #546, lsl #12
44 # CHECK: adds w13, w23, #291, lsl #12
47 # CHECK: cmn x3, #1, lsl #12
53 # CHECK: cmp sp, #20, lsl #12
61 # CHECK: cmn w3, #291, lsl #12
63 # CHECK: cmn sp, #1092, lsl #12
86 # CHECK: add w9, w3, wzr, lsl #10
87 # CHECK: add w17, w29, w20, lsl #31
113 # CHECK: add x9, x3, xzr, lsl #10
114 # CHECK: add x17, x29, x20, lsl #63
140 # CHECK: adds w9, w3, wzr, lsl #10
141 # CHECK: adds w17, w29, w20, lsl #31
167 # CHECK: adds x9, x3, xzr, lsl #10
168 # CHECK: adds x17, x29, x20, lsl #63
194 # CHECK: sub w9, w3, wzr, lsl #10
195 # CHECK: sub w17, w29, w20, lsl #31
221 # CHECK: sub x9, x3, xzr, lsl #10
222 # CHECK: sub x17, x29, x20, lsl #63
248 # CHECK: subs w9, w3, wzr, lsl #10
249 # CHECK: subs w17, w29, w20, lsl #31
275 # CHECK: subs x9, x3, xzr, lsl #10
276 # CHECK: subs x17, x29, x20, lsl #63
301 # CHECK: cmn w8, w9, lsl #15
302 # CHECK: cmn w10, w11, lsl #31
326 # CHECK: cmn x8, x9, lsl #15
327 # CHECK: cmn x10, x11, lsl #63
351 # CHECK: cmp w8, w9, lsl #15
352 # CHECK: cmp w10, w11, lsl #31
376 # CHECK: cmp x8, x9, lsl #15
377 # CHECK: cmp x10, x11, lsl #63
401 # CHECK: {{sub w26, wzr|neg w26}}, w25, lsl #29
402 # CHECK: {{sub w24, wzr|neg w24}}, w23, lsl #31
426 # CHECK: {{sub x26, xzr|neg x26}}, x25, lsl #29
427 # CHECK: {{sub x24, xzr|neg x24}}, x23, lsl #31
451 # CHECK: {{subs w26, wzr|negs w26}}, w25, lsl #29
452 # CHECK: {{subs w24, wzr|negs w24}}, w23, lsl #31
476 # CHECK: {{subs x26, xzr|negs x26}}, x25, lsl #29
477 # CHECK: {{subs x24, xzr|negs x24}}, x23, lsl #31
669 # CHECK: lsl w9, w10, #31
670 # CHECK: lsl x20, x21, #63
671 # CHECK: lsl w1, wzr, #3
746 # CHECK: lsl x2, x3, #63
748 # CHECK: lsl x9, x10, #5
750 # CHECK: lsl w11, w12, #31
751 # CHECK: lsl w13, w14, #29
1065 # CHECK: lsl w11, w12, w13
1066 # CHECK: lsl x14, x15, x16
1086 # CHECK: lsl w6, w7, w8
1087 # CHECK: lsl x9, x10, x11
2439 # CHECK: ldrh w10, [x30, x7, lsl #1]
2464 # CHECK: ldr w10, [x30, x7, lsl #2]
2489 # CHECK: ldr d10, [x30, x7, lsl #3]
2514 # CHECK: ldr q10, [x30, x7, lsl #4]
2813 # CHECK: and w16, w15, w1, lsl #1
2814 # CHECK: and w9, w4, w10, lsl #31
2816 # CHECK: and x3, x5, x7, lsl #63
2839 # CHECK: bic x13, x20, x14, lsl #47
2842 # CHECK: orr x8, x9, x10, lsl #12
2852 # CHECK: ands w7, wzr, w9, lsl #1
2855 # CHECK: bics x3, xzr, x3, lsl #1
2856 # CHECK: tst w3, w7, lsl #31
2883 # CHECK: movz w2, #0, lsl #16
2889 # CHECK: movz x2, #{{1234|0x4d2}}, lsl #32
2890 # CHECK: movk xzr, #{{4321|0x10e1}}, lsl #48
2896 # CHECK: movz x4, #0, lsl #16
2897 # CHECK: movk w5, #0, lsl #16
2898 # CHECK: movz x6, #0, lsl #32
2899 # CHECK: movk x7, #0, lsl #32
2900 # CHECK: movz x8, #0, lsl #48
2901 # CHECK: movk x9, #0, lsl #48
