Lines Matching refs:AMDGPUTargetLowering
47 void AMDGPUTargetLowering::InitAMDILLowering()
243 AMDGPUTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
250 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const
261 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const
277 AMDGPUTargetLowering::computeMaskedBitsForTargetNode(
317 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const
335 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const
354 AMDGPUTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const
420 AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const
451 AMDGPUTargetLowering::genIntType(uint32_t size, uint32_t numEle) const
474 AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const
489 AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const
570 AMDGPUTargetLowering::LowerSDIV32(SDValue Op, SelectionDAG &DAG) const
637 AMDGPUTargetLowering::LowerSDIV64(SDValue Op, SelectionDAG &DAG) const
643 AMDGPUTargetLowering::LowerSREM8(SDValue Op, SelectionDAG &DAG) const
661 AMDGPUTargetLowering::LowerSREM16(SDValue Op, SelectionDAG &DAG) const
679 AMDGPUTargetLowering::LowerSREM32(SDValue Op, SelectionDAG &DAG) const
742 AMDGPUTargetLowering::LowerSREM64(SDValue Op, SelectionDAG &DAG) const
