Lines Matching refs:reg_map
52 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 5] = {
1164 FAIL_IF(ADDLI_SOLO(reg_map[dst_ar], ZERO, imm >> 48));
1165 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 32));
1166 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 16));
1167 return SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm);
1170 FAIL_IF(ADDLI(reg_map[dst_ar], ZERO, imm >> 48));
1171 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 32));
1172 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 16));
1173 return SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm);
1349 FAIL_IF(ADDLI(ADDR_TMP_mapped, reg_map[arg & REG_MASK], argw));
1411 if ((flags & WRITE_BACK) && reg_ar == reg_map[base]) {
1412 SLJIT_ASSERT(!(flags & LOAD_DATA) && reg_map[TMP_REG1] != reg_ar);
1431 FAIL_IF(ADD(TMP_REG3_mapped, reg_map[base], TMP_REG3_mapped));
1438 FAIL_IF(ADD(tmp_ar, reg_map[base], TMP_REG3_mapped));
1446 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1448 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1450 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1458 FAIL_IF(SHLI(TMP_REG3_mapped, reg_map[OFFS_REG(arg)], argw));
1465 FAIL_IF(ADD(TMP_REG3_mapped, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1468 FAIL_IF(ADD(tmp_ar, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1476 FAIL_IF(ADD(reg_map[base], reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1479 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1481 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1486 if (reg_ar == reg_map[base]) {
1489 FAIL_IF(ADDLI(ADDR_TMP_mapped, reg_map[base], argw));
1496 return ADDLI(reg_map[base], reg_map[base], argw);
1507 FAIL_IF(ADDLI(reg_map[base], reg_map[base], argw));
1517 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1522 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1527 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1529 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1569 FAIL_IF(ADD(TMP_REG3_mapped, TMP_REG3_mapped, reg_map[base]));
1576 FAIL_IF(ADD(tmp_ar, TMP_REG3_mapped, reg_map[base]));
1612 return ADD(reg_map[dst], RA, ZERO);
1625 FAIL_IF(ADD(RA, reg_map[src], ZERO));
1645 return ADD(reg_map[dst], reg_map[src2], ZERO);
1653 return BFEXTS(reg_map[dst], reg_map[src2], 0, 31);
1655 return BFEXTU(reg_map[dst], reg_map[src2], 0, 31);
1666 return BFEXTS(reg_map[dst], reg_map[src2], 0, 7);
1668 return BFEXTU(reg_map[dst], reg_map[src2], 0, 7);
1679 return BFEXTS(reg_map[dst], reg_map[src2], 0, 15);
1681 return BFEXTU(reg_map[dst], reg_map[src2], 0, 15);
1690 FAIL_IF(NOR(EQUAL_FLAG, reg_map[src2], reg_map[src2]));
1692 FAIL_IF(NOR(reg_map[dst], reg_map[src2], reg_map[src2]));
1699 FAIL_IF(CLZ(EQUAL_FLAG, reg_map[src2]));
1701 FAIL_IF(CLZ(reg_map[dst], reg_map[src2]));
1708 FAIL_IF(SHRUI(TMP_EREG1, reg_map[src1], 63));
1714 FAIL_IF(ADDLI(EQUAL_FLAG, reg_map[src1], src2));
1718 FAIL_IF(ORI(ULESS_FLAG ,reg_map[src1], src2));
1721 FAIL_IF(OR(ULESS_FLAG,reg_map[src1],ULESS_FLAG));
1727 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], src2));
1730 FAIL_IF(SHRUI(OVERFLOW_FLAG, reg_map[dst], 63));
1737 FAIL_IF(XOR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1741 overflow_ra = reg_map[src1];
1743 overflow_ra = reg_map[src2];
1746 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1752 FAIL_IF(ADD(EQUAL_FLAG ,reg_map[src1], reg_map[src2]));
1755 FAIL_IF(OR(ULESS_FLAG,reg_map[src1], reg_map[src2]));
1759 FAIL_IF(ADD(reg_map[dst],reg_map[src1], reg_map[src2]));
1762 FAIL_IF(XOR(OVERFLOW_FLAG,reg_map[dst], overflow_ra));
1769 FAIL_IF(CMPLTU(ULESS_FLAG ,reg_map[dst] ,ULESS_FLAG));
1780 FAIL_IF(ORI(TMP_EREG1, reg_map[src1], src2));
1783 FAIL_IF(OR(TMP_EREG1, reg_map[src1], TMP_EREG1));
1787 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], src2));
1791 FAIL_IF(OR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1794 FAIL_IF(ADD(reg_map[dst], reg_map[src1], reg_map[src2]));
1798 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[dst], TMP_EREG1));
1800 FAIL_IF(ADD(reg_map[dst], reg_map[dst], ULESS_FLAG));
1806 FAIL_IF(CMPLTUI(TMP_EREG2, reg_map[dst], 1));
1820 FAIL_IF(SHRUI(TMP_EREG1,reg_map[src1], 63));
1826 overflow_ra = reg_map[src1];
1829 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1836 FAIL_IF(ADDLI(EQUAL_FLAG, reg_map[src1], -src2));
1840 FAIL_IF(CMPLTU(ULESS_FLAG, reg_map[src1], ADDR_TMP_mapped));
1845 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], -src2));
1850 FAIL_IF(XOR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1854 overflow_ra = reg_map[src1];
1857 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1863 FAIL_IF(SUB(EQUAL_FLAG, reg_map[src1], reg_map[src2]));
1866 FAIL_IF(CMPLTU(ULESS_FLAG, reg_map[src1], reg_map[src2]));
1869 FAIL_IF(CMPLTU(UGREATER_FLAG, reg_map[src2], reg_map[src1]));
1872 FAIL_IF(CMPLTS(LESS_FLAG ,reg_map[src1] ,reg_map[src2]));
1873 FAIL_IF(CMPLTS(GREATER_FLAG ,reg_map[src2] ,reg_map[src1]));
1878 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2]));
1882 FAIL_IF(XOR(OVERFLOW_FLAG, reg_map[dst], overflow_ra));
1899 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[src1], ADDR_TMP_mapped));
1903 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], -src2));
1907 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[src1], reg_map[src2]));
1909 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2]));
1913 FAIL_IF(CMOVEQZ(TMP_EREG1, reg_map[dst], ULESS_FLAG));
1915 FAIL_IF(SUB(reg_map[dst], reg_map[dst], ULESS_FLAG));
1927 compiler, op_norm, EQUAL_FLAG, reg_map[src1], \
1931 compiler, op_norm, reg_map[dst], reg_map[src1], \
1936 compiler, op_norm, EQUAL_FLAG, reg_map[src1], \
1937 reg_map[src2], __LINE__)); \
1940 compiler, op_norm, reg_map[dst], reg_map[src1], \
1941 reg_map[src2], __LINE__)); \
1960 compiler, op_imm, EQUAL_FLAG, reg_map[src1], \
1964 compiler, op_imm, reg_map[dst], reg_map[src1], \
1969 compiler, op_imm, reg_map[dst], reg_map[src1], \
1973 compiler, op_norm, reg_map[dst], reg_map[src1], \
1974 reg_map[src2], __LINE__)); \
2076 FAIL_IF(load_immediate(compiler, reg_map[sugg_src2_r], src2w));
2085 if (getput_arg_fast(compiler, flags | LOAD_DATA, reg_map[sugg_src2_r], src2, src2w))
2104 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, reg_map[sugg_src2_r], src2, src2w, dst, dstw));
2110 getput_arg_fast(compiler, flags, reg_map[dst_r], dst, dstw);
2114 return getput_arg(compiler, flags, reg_map[dst_r], dst, dstw, 0, 0);
2133 sugg_dst_ar = reg_map[(op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2];
2367 if (reg_map[src] != 0)
2370 FAIL_IF(ADD_SOLO(TMP_REG2_mapped, reg_map[src], ZERO));
2374 SLJIT_ASSERT(reg_map[PIC_ADDR_REG] == 16 && PIC_ADDR_REG == TMP_REG2);
2377 FAIL_IF(emit_const(compiler, reg_map[PIC_ADDR_REG], srcw, 1));
2383 FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
2387 FAIL_IF(JALR_SOLO(reg_map[PIC_ADDR_REG]));
2394 FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
2396 FAIL_IF(ADD_SOLO(reg_map[PIC_ADDR_REG], reg_map[src_r], ZERO));
2400 FAIL_IF(JALR_SOLO(reg_map[src_r]));
2415 FAIL_IF(JR_SOLO(reg_map[src_r]));
2418 FAIL_IF(JR_SOLO(reg_map[src_r]));
2426 FAIL_IF(JR_SOLO(reg_map[src_r]));
2521 SLJIT_ASSERT(reg_map[PIC_ADDR_REG] == 16 && PIC_ADDR_REG == TMP_REG2);
2524 PTR_FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
