Lines Matching full:opc2
3217 UInt opc2 = ifieldOPClo9(theInstr);
3305 switch (opc2) {
3822 vex_printf("dis_int_arith(ppc)(opc2)\n");
3855 UInt opc2 = ifieldOPClo10(theInstr);
3908 switch (opc2) {
3948 vex_printf("dis_int_cmp(ppc)(opc2)\n");
3973 UInt opc2 = ifieldOPClo10(theInstr);
4031 switch (opc2) {
4322 vex_printf("dis_int_logic(ppc)(opc2)\n");
4350 UInt opc2 = ifieldOPClo10(theInstr);
4383 switch (opc2) {
4459 vex_printf("dis_int_parity(ppc)(opc2)\n");
4483 UChar opc2 = toUChar( IFIELD( theInstr, 2, 3 ) );
4615 switch (opc2) {
4699 vex_printf("dis_int_rot(ppc)(opc2)\n");
4730 UInt opc2 = ifieldOPClo10(theInstr);
4834 switch (opc2) {
4938 vex_printf("dis_int_load(ppc)(opc2)\n");
4969 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
5021 UInt opc2 = ifieldOPClo10(theInstr);
5099 switch (opc2) {
5163 vex_printf("dis_int_store(ppc)(opc2)\n");
5214 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
5383 UInt opc2 = ifieldOPClo10(theInstr);
5397 switch (opc2) {
5464 vex_printf("dis_int_ldst_str(ppc)(opc2)\n");
5553 UInt opc2 = ifieldOPClo10(theInstr);
5662 switch (opc2) {
5737 vex_printf("dis_int_branch(ppc)(opc2)\n");
5764 UInt opc2 = ifieldOPClo10(theInstr);
5776 if (opc2 == 0) { // mcrf (Move Cond Reg Field, PPC32 p464)
5792 switch (opc2) {
5833 vex_printf("dis_cond_logic(ppc)(opc2)\n");
5994 UInt opc2 = ifieldOPClo10(theInstr);
6005 switch (opc2) {
6099 UInt opc2 = ifieldOPClo10(theInstr);
6110 if (opc2 != 0x096) {
6111 vex_printf("dis_memsync(ppc)(0x13,opc2)\n");
6124 switch (opc2) {
6357 vex_printf("dis_memsync(ppc)(opc2)\n");
6382 UInt opc2 = ifieldOPClo10(theInstr);
6401 switch (opc2) {
6587 vex_printf("dis_int_shift(ppc)(opc2)\n");
6648 UInt opc2 = ifieldOPClo10(theInstr);
6663 switch (opc2) {
6724 vex_printf("dis_int_ldst_rev(ppc)(opc2)\n");
6753 UInt opc2 = ifieldOPClo10(theInstr);
6773 switch (opc2) {
7126 vex_printf("dis_proc_ctl(ppc)(opc2)\n");
7145 UInt opc2 = ifieldOPClo10(theInstr);
7155 if (opc1 == 0x1F && ((opc2 == 0x116) || (opc2 == 0xF6))) {
7159 if (opc1 == 0x1F && opc2 == 0x116 && b21to25 == 0x11)
7162 if (opc1 == 0x1F && opc2 == 0x3F6) { // dcbz
7183 switch (opc2) {
7279 vex_printf("dis_cache_manage(ppc)(opc2)\n");
7443 UInt opc2 = ifieldOPClo10(theInstr);
7501 switch(opc2) {
7557 vex_printf("dis_fp_load(ppc)(opc2)\n");
7581 UInt opc2 = ifieldOPClo10(theInstr);
7644 switch(opc2) {
7688 vex_printf("dis_fp_store(ppc)(opc2)\n");
7713 UChar opc2 = ifieldOPClo5(theInstr);
7739 switch (opc2) {
7812 vex_printf("dis_fp_arith(ppc)(3B: opc2)\n");
7818 switch (opc2) {
7913 vex_printf("dis_fp_arith(ppc)(3F: opc2)\n");
7951 UChar opc2 = ifieldOPClo5(theInstr);
7995 switch (opc2) {
8013 if (opc2 == 0x1E) {
8033 vex_printf("dis_fp_multadd(ppc)(3B: opc2)\n");
8039 switch (opc2) {
8057 if (opc2 == 0x1E) {
8077 vex_printf("dis_fp_multadd(ppc)(3F: opc2)\n");
8429 UInt opc2 = ifieldOPClo10(theInstr);
8438 switch (opc2) {
8480 vex_printf("dis_fp_tests(ppc)(opc2)\n");
8498 UInt opc2 = ifieldOPClo10(theInstr);
8570 switch (opc2) {
8578 vex_printf("dis_fp_cmp(ppc)(opc2)\n");
8596 UInt opc2 = ifieldOPClo10(theInstr);
8626 switch (opc2) {
8643 switch (opc2) {
8670 DIP("fctiwu%s%s fr%u,fr%u\n", opc2 == 0x08F ? "z" : "",
8674 opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm,
8703 DIP("fctidu%s%s fr%u,fr%u\n", opc2 == 0x3AE ? "" : "z",
8706 binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) );
8726 switch(opc2) {
8780 vex_printf("dis_fp_round(ppc)(opc2)\n");
8812 UInt opc2 = ifieldOPClo10(theInstr);
8828 switch(opc2) {
8837 vex_printf("dis_fp_pair(ppc) : X-form wrong opc2\n");
8887 UInt opc2 = ifieldOPClo10(theInstr);
8899 switch (opc2) {
8927 vex_printf("dis_fp_merge(ppc)(opc2)\n");
8945 UInt opc2 = ifieldOPClo10(theInstr);
8955 if (opc1 != 0x3F || (frA_addr != 0 && opc2 != 0x008)) {
8962 switch (opc2) {
9017 vex_printf("dis_fp_move(ppc)(opc2)\n");
9043 UInt opc2 = ifieldOPClo10(theInstr);
9051 switch (opc2) {
9205 vex_printf("dis_fp_scr(ppc)(opc2)\n");
9860 UInt opc2 = ifieldOPClo10( theInstr );
9882 switch (opc2) {
9918 UInt opc2 = ifieldOPClo10( theInstr );
9940 switch (opc2) {
9975 UInt opc2 = ifieldOPClo9( theInstr );
9987 switch (opc2) {
10012 UInt opc2 = ifieldOPClo9( theInstr );
10024 switch (opc2) {
10049 UInt opc2 = ifieldOPClo10( theInstr );
10058 switch (opc2) {
10115 UInt opc2 = ifieldOPClo10( theInstr );
10126 switch (opc2) {
10186 UInt opc2 = ifieldOPClo8( theInstr );
10189 switch (opc2) {
10211 vex_printf("dis_dfp_round(ppc)(opc2)\n");
10232 UInt opc2 = ifieldOPClo8( theInstr );
10234 switch (opc2) {
10252 vex_printf("dis_dfp_roundq(ppc)(opc2)\n");
10265 UInt opc2 = ifieldOPClo8( theInstr );
10280 switch (opc2) {
10345 vex_printf("dis_dfp_quantize_sig_rrnd(ppc)(opc2)\n");
10359 UInt opc2 = ifieldOPClo8( theInstr );
10374 switch (opc2) {
10440 vex_printf("dis_dfp_quantize_sig_rrndq(ppc)(opc2)\n");
10454 UInt opc2 = ifieldOPClo10( theInstr );
10469 switch (opc2) {
10485 vex_printf("dis_dfp_extract_insert(ppc)(opc2)\n");
10500 UInt opc2 = ifieldOPClo10( theInstr );
10515 switch (opc2) {
10537 vex_printf("dis_dfp_extract_insertq(ppc)(opc2)\n");
10586 vex_printf("dis_dfp_compare(ppc)(opc2)\n");
10684 vex_printf("dis_dfp_exponent_test(ppc)(opc2)\n");
10824 UInt opc2 = ifieldOPClo9( theInstr );
10889 DIP("dtstd%s %u,r%u,%d\n", opc2 == 0xc2 ? "c" : "g",
10925 DIP("dtstd%sq %u,r%u,%d\n", opc2 == 0xc2 ? "c" : "g",
10974 vex_printf("dis_dfp_class_test(ppc)(opc2)\n");
11076 if (opc2 == 0xC2) { // dtstdc, dtstdcq
11111 } else if (opc2 == 0xE2) { // dtstdg, dtstdgq
11260 UInt opc2 = ifieldOPClo10( theInstr );
11279 switch ( opc2 ) {
11513 vpanic( "ERROR: dis_dfp_bcd(ppc), undefined opc2 case " );
11521 UInt opc2 = ifieldOPClo10( theInstr );
11540 switch ( opc2 ) {
11922 vpanic( "ERROR: dis_dfp_bcdq(ppc), undefined opc2 case " );
12136 UInt opc2 = ifieldOPClo10(theInstr);
12144 switch (opc2) {
12157 vex_printf("dis_av_datastream(ppc)(opc2,dst)\n");
12168 vex_printf("dis_av_datastream(ppc)(opc2)\n");
12184 UInt opc2 = IFIELD( theInstr, 0, 11 );
12191 switch (opc2) {
12194 opc2,dst)\n");
12204 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
12213 vex_printf("dis_av_procctl(ppc)(opc2)\n");
12223 dis_vx_conv ( UInt theInstr, UInt opc2 )
12239 switch (opc2) {
12298 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
12303 switch (opc2) {
12410 Bool un_signed = (opc2 == 0x110);
12711 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
12721 dis_vxv_dp_arith ( UInt theInstr, UInt opc2 )
12744 switch (opc2) {
12752 switch (opc2) {
12823 switch (opc2) {
12828 mdp = (opc2 & 0x0FF) == 0x0A4;
12835 mdp = (opc2 & 0x0FF) == 0x0E4;
12842 switch (opc2) {
12954 vex_printf( "dis_vxv_dp_arith(ppc)(opc2)\n" );
12964 dis_vxv_sp_arith ( UInt theInstr, UInt opc2 )
12987 switch (opc2) {
13090 switch (opc2) {
13093 msp = (opc2 & 0x0FF) == 0x024;
13100 msp = (opc2 & 0x0FF) == 0x064;
13109 switch (opc2) {
13280 vex_printf( "dis_vxv_sp_arith(ppc)(opc2)\n" );
13290 dis_av_count_bitTranspose ( UInt theInstr, UInt opc2 )
13303 switch (opc2) {
13445 vex_printf("dis_av_count_bitTranspose(ppc)(opc2)\n");
13639 static const HChar * _get_vsx_rdpi_suffix(UInt opc2)
13641 switch (opc2 & 0x7F) {
13654 vex_printf("Unrecognized opcode %x\n", opc2);
13655 vpanic("_get_vsx_rdpi_suffix(ppc)(opc2)");
13662 static IRExpr * _do_vsx_fp_roundToInt(IRTemp frB_I64, UInt opc2)
13672 switch (opc2 & 0x7F) {
13690 vex_printf("Unrecognized opcode %x\n", opc2);
13691 vpanic("_do_vsx_fp_roundToInt(ppc)(opc2)");
13754 dis_vxv_misc ( UInt theInstr, UInt opc2 )
13766 switch (opc2) {
13775 Bool redp = opc2 == 0x1B4;
13824 Bool resp = opc2 == 0x134;
13892 Bool isMin = opc2 == 0x320 ? True : False;
13941 Bool isMin = opc2 == 0x3A0 ? True : False;
14041 Bool make_negative = (opc2 == 0x3D2) ? True : False;
14068 Bool make_negative = (opc2 == 0x352) ? True : False;
14127 frD_fp_roundHi = _do_vsx_fp_roundToInt(frBHi_I64, opc2);
14129 frD_fp_roundLo = _do_vsx_fp_roundToInt(frBLo_I64, opc2);
14131 DIP("xvrdpi%s v%d,v%d\n", _get_vsx_rdpi_suffix(opc2), (UInt)XT, (UInt)XB);
14146 if (opc2 != 0x156) {
14148 switch (opc2) {
14167 vex_printf("Unrecognized opcode %x\n", opc2);
14168 vpanic("dis_vxv_misc(ppc)(vrspi<x>)(opc2)\n");
14189 _do_vsx_fp_roundToInt(b3_I64, opc2));
14191 _do_vsx_fp_roundToInt(b2_I64, opc2));
14193 _do_vsx_fp_roundToInt(b1_I64, opc2));
14195 _do_vsx_fp_roundToInt(b0_I64, opc2));
14210 vex_printf( "dis_vxv_misc(ppc)(opc2)\n" );
14221 dis_vxs_arith ( UInt theInstr, UInt opc2 )
14244 switch (opc2) {
14296 Bool mdp = opc2 == 0x024;
14314 Bool mdp = opc2 == 0x0A4;
14331 Bool mdp = opc2 == 0x064;
14349 Bool mdp = opc2 == 0x0E4;
14370 Bool mdp = opc2 == 0x2A4;
14390 Bool mdp = opc2 == 0x224;
14415 Bool mdp = opc2 == 0x264;
14439 Bool mdp = opc2 == 0x2E4;
14538 vex_printf( "dis_vxs_arith(ppc)(opc2)\n" );
14550 dis_vx_cmp( UInt theInstr, UInt opc2 )
14568 switch (opc2) {
14572 DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o",
14579 vex_printf( "dis_vx_cmp(ppc)(opc2)\n" );
14674 dis_vvec_cmp( UInt theInstr, UInt opc2 )
14693 switch (opc2) {
14761 opc2)\n" );
14770 dis_vxs_misc( UInt theInstr, UInt opc2 )
14793 switch (opc2) {
14858 Bool isMin = opc2 == 0x2A0 ? True : False;
14877 frD_fp_round = _do_vsx_fp_roundToInt(frB_I64, opc2);
14879 DIP("xsrdpi%s v%d,v%d\n", _get_vsx_rdpi_suffix(opc2), (UInt)XT, (UInt)XB);
14895 Bool redp = opc2 == 0x034;
14929 Bool redp = opc2 == 0x0B4;
14970 vex_printf( "dis_vxs_misc(ppc)(opc2)\n" );
14980 dis_vx_logic ( UInt theInstr, UInt opc2 )
14998 switch (opc2) {
15040 vex_printf( "dis_vx_logic(ppc)(opc2)\n" );
15058 UInt opc2 = ifieldOPClo10( theInstr );
15070 switch (opc2) {
15166 vex_printf( "dis_vx_load(ppc)(opc2)\n" );
15185 UInt opc2
15198 switch (opc2) {
15274 vex_printf( "dis_vx_store(ppc)(opc2)\n" );
15284 dis_vx_permute_misc( UInt theInstr, UInt opc2 )
15303 switch (opc2) {
15345 const HChar type = (opc2 == 0x48) ? 'h' : 'l';
15346 IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64;
15395 vex_printf( "dis_vx_permute_misc(ppc)(opc2)\n" );
15411 UInt opc2 = ifieldOPClo10(theInstr);
15426 switch (opc2) {
15527 vex_printf("dis_av_load(ppc)(opc2)\n");
15543 UInt opc2 = ifieldOPClo10(theInstr);
15561 switch (opc2) {
15613 vex_printf("dis_av_store(ppc)(opc2)\n");
15629 UInt opc2 = IFIELD( theInstr, 0, 11 );
15655 switch (opc2) {
16120 vex_printf("dis_av_arith(ppc)(opc2=0x%x)\n", opc2);
16136 UInt opc2 = IFIELD( theInstr, 0, 11 );
16148 switch (opc2) {
16198 vex_printf("dis_av_logic(ppc)(opc2=0x%x)\n", opc2);
16215 UInt opc2 = IFIELD( theInstr, 0, 10 );
16228 switch (opc2) {
16302 vex_printf("dis_av_cmp(ppc)(opc2)\n");
16325 UChar opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
16361 switch (opc2) {
16574 vex_printf("dis_av_multarith(ppc)(opc2)\n");
16591 UInt opc2 = IFIELD(theInstr, 0, 11);
16605 switch (opc2) {
16628 vex_printf("dis_av_polymultarith(ppc)(opc2=0x%x)\n", opc2);
16644 UInt opc2 = IFIELD( theInstr, 0, 11 );
16656 switch (opc2) {
16786 vex_printf("dis_av_shift(ppc)(opc2)\n");
16806 UInt opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
16822 switch (opc2) {
16899 opc2 = IFIELD( theInstr, 0, 11 );
16900 switch (opc2) {
17007 vex_printf("dis_av_permute(ppc)(opc2)\n");
17023 UInt opc2 = IFIELD( theInstr, 0, 11 );
17036 switch (opc2) {
17215 switch (opc2) {
17327 vex_printf("dis_av_pack(ppc)(opc2)\n");
17343 UInt opc2 = IFIELD( theInstr, 0, 11 );
17354 switch (opc2) {
17388 vex_printf("dis_av_cipher(ppc)(opc2)\n");
17406 UInt opc2 = IFIELD( theInstr, 0, 11 );
17417 switch (opc2) {
17430 vex_printf("dis_av_hash(ppc)(opc2)\n");
17528 UInt opc2 = IFIELD( theInstr, 0, 11 );
17542 switch (opc2) {
17644 opc2 = IFIELD( theInstr, 0, 6 );
17648 switch (opc2) {
17707 vex_printf("dis_av_quad(ppc)(opc2.2)\n");
17730 UInt opc2 = IFIELD( theInstr, 0, 9 );
17743 switch (opc2) {
17759 vex_printf("dis_av_bcd(ppc)(opc2)\n");
17776 UInt opc2=0;
17793 opc2 = IFIELD( theInstr, 0, 6 );
17794 switch (opc2) {
17820 opc2 = IFIELD( theInstr, 0, 11 );
17821 switch (opc2) {
17854 switch (opc2) {
17876 vex_printf("dis_av_fp_arith(ppc)(opc2=0x%x)\n",opc2);
17893 UInt opc2 = IFIELD( theInstr, 0, 10 );
17908 switch (opc2) {
17964 vex_printf("dis_av_fp_cmp(ppc)(opc2)\n");
17986 UInt opc2 = IFIELD( theInstr, 0, 11 );
18008 switch (opc2) {
18049 switch (opc2) {
18071 vex_printf("dis_av_fp_convert(ppc)(opc2)\n");
18083 UInt opc2 = IFIELD( theInstr, 1, 10 );
18085 switch (opc2) {
18493 UInt opc2;
18628 /* We don't know what it is. Set opc1/opc2 so decode_failure
18632 opc2 = ifieldOPClo10(theInstr);
18639 opc2 = ifieldOPClo10(theInstr);
18745 opc2 = ifieldOPClo10(theInstr);
18747 switch (opc2) {
18808 opc2 = ifieldOPClo9( theInstr );
18809 switch (opc2) {
18826 opc2 = ifieldOPClo8( theInstr );
18827 switch (opc2) {
18851 break; /* fall through to next opc2 check */
18854 opc2 = IFIELD(theInstr, 1, 5);
18855 switch (opc2) {
18892 UInt vsxOpc2 = get_VSX60_opc2(opc2);
19035 opc2 = IFIELD(theInstr, 1, 5);
19036 switch (opc2) {
19066 opc2 = IFIELD(theInstr, 1, 10);
19067 switch (opc2) {
19184 opc2 = ifieldOPClo9( theInstr );
19185 switch (opc2) {
19204 opc2 = ifieldOPClo8( theInstr );
19205 switch (opc2) {
19232 switch (opc2) {
19263 opc2 = IFIELD(theInstr, 1, 9);
19264 switch (opc2) {
19305 opc2 = IFIELD(theInstr, 1, 10);
19306 switch (opc2) {
19590 opc2 = IFIELD(theInstr, 0, 6);
19591 switch (opc2) {
19629 opc2 = IFIELD(theInstr, 0, 9);
19630 switch (opc2) {
19641 opc2 = IFIELD(theInstr, 0, 11);
19642 switch (opc2) {
19785 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
19791 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
19796 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
19810 opc2 = IFIELD(theInstr, 0, 10);
19811 switch (opc2) {
19879 opc2 = (theInstr) & 0x7FF;
19884 opc1, opc1, opc2, opc2);
