Lines Matching full:archreg
450 static Int integerGuestRegOffset ( Int sz, UInt archreg )
452 vassert(archreg < 8);
457 if (sz == 4 || sz == 2 || (sz == 1 && archreg < 4)) {
458 switch (archreg) {
471 vassert(archreg >= 4 && archreg < 8 && sz == 1);
472 switch (archreg-4) {
539 static IRExpr* getIReg ( Int sz, UInt archreg )
542 vassert(archreg < 8);
543 return IRExpr_Get( integerGuestRegOffset(sz,archreg),
548 static void putIReg ( Int sz, UInt archreg, IRExpr* e )
557 vassert(archreg < 8);
558 stmt( IRStmt_Put(integerGuestRegOffset(sz,archreg), e) );
5534 static IRExpr* getMMXReg ( UInt archreg )
5536 vassert(archreg < 8);
5537 return IRExpr_Get( OFFB_FPREGS + 8 * archreg, Ity_I64 );
5541 static void putMMXReg ( UInt archreg, IRExpr* e )
5543 vassert(archreg < 8);
5545 stmt( IRStmt_Put( OFFB_FPREGS + 8 * archreg, e ) );
13074 Int archReg = getIByte(delta) - 0x58;
13076 putIReg(4, archReg, mkU32(guest_EIP_bbstart+delta));
13078 DIP("call 0x%x ; popl %s\n",d32,nameIReg(4,archReg));
13105 //-- uInstr2(cb, GET, sz, ArchReg, R_EBP, TempReg, t1);
13106 //-- uInstr2(cb, GET, 4, ArchReg, R_ESP, TempReg, t2);
13109 //-- uInstr2(cb, PUT, 4, TempReg, t2, ArchReg, R_ESP);
13111 //-- uInstr2(cb, PUT, 4, TempReg, t2, ArchReg, R_EBP);
13115 //-- uInstr2(cb, PUT, 4, TempReg, t2, ArchReg, R_ESP);
14897 //-- uInstr2(cb, GET, 4, ArchReg, R_EAX, TempReg, t1);
14916 //-- uInstr2(cb, PUT, 4, TempReg, t4, ArchReg, R_EDX);
14919 //-- uInstr2(cb, PUT, 4, TempReg, t3, ArchReg, R_ECX);
14922 //-- uInstr2(cb, PUT, 4, TempReg, t2, ArchReg, R_EBX);
14925 //-- uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_EAX);
14964 //-- uInstr2(cb, GET, 4, ArchReg, gregOfRM(modrm), TempReg, t1);
