Lines Matching defs:simm9
230 ARM64AMode* ARM64AMode_RI9 ( HReg reg, Int simm9 ) {
234 am->ARM64am.RI9.simm9 = simm9;
235 vassert(-256 <= simm9 && simm9 <= 255);
264 vex_printf("%d(", am->ARM64am.RI9.simm9);
323 //ZZ ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ) {
327 //ZZ am->ARMam2.RI.simm9 = simm9;
328 //ZZ vassert(-255 <= simm9 && simm9 <= 255);
342 //ZZ vex_printf("%d(", am->ARMam2.RI.simm9);
3820 /* STURB Wd, [Xn|SP + simm9]: 00 111000 000 simm9 00 n d
3821 LDURB Wd, [Xn|SP + simm9]: 00 111000 010 simm9 00 n d
3823 Int simm9 = am->ARM64am.RI9.simm9;
3824 vassert(-256 <= simm9 && simm9 <= 255);
3826 simm9 & 0x1FF, X00,
3869 /* STURH Wd, [Xn|SP + simm9]: 01 111000 000 simm9 00 n d
3870 LDURH Wd, [Xn|SP + simm9]: 01 111000 010 simm9 00 n d
3872 Int simm9 = am->ARM64am.RI9.simm9;
3873 vassert(-256 <= simm9 && simm9 <= 255);
3875 simm9 & 0x1FF, X00,
3918 /* STUR Wd, [Xn|SP + simm9]: 10 111000 000 simm9 00 n d
3919 LDUR Wd, [Xn|SP + simm9]: 10 111000 010 simm9 00 n d
3921 Int simm9 = am->ARM64am.RI9.simm9;
3922 vassert(-256 <= simm9 && simm9 <= 255);
3924 simm9 & 0x1FF, X00,
3968 /* STUR Xd, [Xn|SP + simm9]: 11 111000 000 simm9 00 n d
3969 LDUR Xd, [Xn|SP + simm9]: 11 111000 010 simm9 00 n d
3971 Int simm9 = am->ARM64am.RI9.simm9;
3972 vassert(-256 <= simm9 && simm9 <= 255);
3976 simm9 & 0x1FF, X00, xN, xD);
4312 //ZZ if (am->ARMam2.RI.simm9 < 0) {
4314 //ZZ simm8 = -am->ARMam2.RI.simm9;
4317 //ZZ simm8 = am->ARMam2.RI.simm9;
4359 //ZZ if (am->ARMam2.RI.simm9 < 0) {
4361 //ZZ simm8 = -am->ARMam2.RI.simm9;
4364 //ZZ simm8 = am->ARMam2.RI.simm9;
