Cross Reference: /external/valgrind/main/VEX/priv/host_arm64

Lines Matching refs:HRegClass
58    switch (hregClass(reg)) {
1375    vassert(hregClass(src) == HRcInt64);
1376    vassert(hregClass(dst) == HRcInt64);
1836         vassert(hregClass(src) == HRcVec128);
1837         vassert(hregClass(dst) == HRcVec128);
1840         vassert(hregClass(src) == HRcFlt64);
1841 hregClass(dst) == HRcFlt64);
3227    HRegClass rclass;
3232    rclass = hregClass(rreg);
3268    HRegClass rclass;
3273    rclass = hregClass(rreg);
3314    vassert(hregClass(r) == HRcInt64);
3324    vassert(hregClass(r) == HRcFlt64 || hregClass(r) == HRcInt64);
3334    vassert(hregClass(r) == HRcVec128);
5622 //ZZ          vassert(hregClass(i->ARMin.NLdStD.dD) == HRcFlt64);
5651 //ZZ                regD = (hregClass(i->ARMin.NUnaryS.dst->reg) == HRcVec128)
5654 //ZZ                regM = (hregClass(i->ARMin.NUnaryS.src->reg) == HRcVec128)
5797 //ZZ          UInt regD = (hregClass(i->ARMin.NUnary.dst) == HRcVec128)
5808 //ZZ             regM = (hregClass(i->ARMin.NUnary.src) == HRcVec128) 
6013 //ZZ          UInt regD = (hregClass(i->ARMin.NDual.arg1) == HRcVec128)
6016 //ZZ          UInt regM = (hregClass(i->ARMin.NDual.arg2) == HRcVec128)
6047 //ZZ          UInt regD = (hregClass(i->ARMin.NBinary.dst) == HRcVec128)
6050 //ZZ          UInt regN = (hregClass(i->ARMin.NBinary.argL) == HRcVec128)
6053 //ZZ          UInt regM = (hregClass(i->ARMin.NBinary.argR) == HRcVec128)
6273 //ZZ          UInt regD = (hregClass(i->ARMin.NShift.dst) == HRcVec128)
6276 //ZZ          UInt regM = (hregClass(i->ARMin.NShift.argL) == HRcVec128)
6279 //ZZ          UInt regN = (hregClass(i->ARMin.NShift.argR) == HRcVec128)
6319 //ZZ          vassert(hregClass(regDreg) == HRcFlt64);
6320 //ZZ          vassert(hregClass(regMreg) == HRcFlt64);
6432 //ZZ          UInt Q = (hregClass(i->ARMin.NeonImm.dst) == HRcVec128) ? 1 : 0;
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