Lines Matching refs:dN
4798 Fn is Dn when x==1, Sn when x==0
4807 case ARM64cvt_F64_I32S: /* FCVTxS Wd, Dn */
4811 case ARM64cvt_F64_I32U: /* FCVTxU Wd, Dn */
4815 case ARM64cvt_F64_I64S: /* FCVTxS Xd, Dn */
4819 case ARM64cvt_F64_I64U: /* FCVTxU Xd, Dn */
4847 ---------- 01 ----- 0,0 --------- FCVT Sd, Dn (D->S)
4861 000,11110 01 1,0000 0,0 10000 n d FMOV Dd, Dn (not handled)
4867 UInt dN = dregNo(i->ARM64in.VUnaryD.src);
4878 (b15 << 5) | X10000, dN, dD);
4885 *p++ = X_3_8_5_6_5_5(X000, X11110011, X00111, X110000, dN, dD);
4924 000 11110 011 m 0001 10 n d FDIV Dd,Dn,Dm
4929 UInt dN = dregNo(i->ARM64in.VBinD.argL);
4941 = X_3_8_5_6_5_5(X000, X11110011, dM, (b1512 << 2) | X10, dN, dD);
4947 000 11110 001 m 0001 10 n d FDIV Dd,Dn,Dm
4968 /* 000 11110 01 1 m 00 1000 n 00 000 FCMP Dn, Dm */
4969 UInt dN = dregNo(i->ARM64in.VCmpD.argL);
4971 *p++ = X_3_8_5_6_5_5(X000, X11110011, dM, X001000, dN, X00000);
5463 //ZZ UInt dN = fregNo(i->ARMin.VAluS.argL);
5466 //ZZ UInt bN = dN & 1;
5483 //ZZ (dN >> 1), (dD >> 1),
6414 000 11110 01 10000 00 10000 n d FMOV Dd, Dn
