Lines Matching refs:rQ
1536 ARM64Instr* ARM64Instr_VLdStQ ( Bool isLoad, HReg rQ, HReg rN ) {
1540 i->ARM64in.VLdStQ.rQ = rQ;
1797 ARM64Instr* ARM64Instr_VImmQ (HReg rQ, UShort imm) {
1800 i->ARM64in.VImmQ.rQ = rQ;
1811 ARM64Instr* ARM64Instr_VQfromXX ( HReg rQ, HReg rXhi, HReg rXlo ) {
1814 i->ARM64in.VQfromXX.rQ = rQ;
1819 ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo ) {
1823 i->ARM64in.VXfromQ.rQ = rQ;
2181 ppHRegARM64(i->ARM64in.VLdStQ.rQ);
2473 ppHRegARM64(i->ARM64in.VImmQ.rQ);
2484 ppHRegARM64(i->ARM64in.VQfromXX.rQ);
2494 ppHRegARM64(i->ARM64in.VXfromQ.rQ);
2730 addHRegUse(u, HRmWrite, i->ARM64in.VLdStQ.rQ);
2732 addHRegUse(u, HRmRead, i->ARM64in.VLdStQ.rQ);
2869 addHRegUse(u, HRmWrite, i->ARM64in.VImmQ.rQ);
2876 addHRegUse(u, HRmWrite, i->ARM64in.VQfromXX.rQ);
2882 addHRegUse(u, HRmRead, i->ARM64in.VXfromQ.rQ);
3024 i->ARM64in.VLdStQ.rQ = lookupHRegRemap(m, i->ARM64in.VLdStQ.rQ);
3141 i->ARM64in.VImmQ.rQ = lookupHRegRemap(m, i->ARM64in.VImmQ.rQ);
3150 i->ARM64in.VQfromXX.rQ
3151 = lookupHRegRemap(m, i->ARM64in.VQfromXX.rQ);
3160 i->ARM64in.VXfromQ.rQ
3161 = lookupHRegRemap(m, i->ARM64in.VXfromQ.rQ);
4730 /* 0100 1100 0000 0000 0111 11 rN rQ st1 {vQ.2d}, [<rN|SP>]
4731 0100 1100 0100 0000 0111 11 rN rQ ld1 {vQ.2d}, [<rN|SP>]
4733 UInt rQ = qregNo(i->ARM64in.VLdStQ.rQ);
4735 vassert(rQ < 32);
4738 *p++ = 0x4C407C00 | (rN << 5) | rQ;
4740 *p++ = 0x4C007C00 | (rN << 5) | rQ;
6335 UInt rQ = qregNo(i->ARM64in.VImmQ.rQ);
6338 /* movi rQ.4s, #0x0 == 0x4F 0x00 0x04 000 rQ */
6339 vassert(rQ < 32);
6340 *p++ = 0x4F000400 | rQ;
6345 vassert(rQ < 32);
6346 *p++ = 0x2F00E420 | rQ;
6351 vassert(rQ < 32);
6352 *p++ = 0x2F00E460 | rQ;
6357 vassert(rQ < 32);
6358 *p++ = 0x2F00E5E0 | rQ;
6363 vassert(rQ < 32);
6364 *p++ = 0x2F07E7E0 | rQ;
6389 UInt qq = qregNo(i->ARM64in.VQfromXX.rQ);
6403 UInt nn = qregNo(i->ARM64in.VXfromQ.rQ);
