Lines Matching refs:one
433 encoding, and we need to translate that to an ARM64 FP one:
586 (since there is only one calling convention) and so we always
833 result. The expression may only be a 64-bit one.
949 //ZZ result. The expression may only be a 32-bit one.
1017 //ZZ without knowing (before this call) which one.
1472 ARM64RIL* one = mb_mkARM64RIL_I(1);
1473 vassert(one);
1474 addInstr(env, ARM64Instr_Test(rTmp, one));
1494 ARM64RIL* one = mb_mkARM64RIL_I(1);
1495 vassert(one); /* '1' must be representable */
1496 addInstr(env, ARM64Instr_Test(rTmp, one));
2117 HReg one = newVRegI(env);
2120 addInstr(env, ARM64Instr_Imm64(one, 1));
2122 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
2175 ARM64RIL* one = mb_mkARM64RIL_I(1);
2177 vassert(one);
2178 addInstr(env, ARM64Instr_Logic(dst, src, one, ARM64lo_AND));
2182 HReg one = newVRegI(env);
2184 addInstr(env, ARM64Instr_Imm64(one, 1));
2186 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
6616 Make sure the value in the register is only zero or one,
6626 HReg one = newVRegI(env);
6629 addInstr(env, ARM64Instr_Imm64(one, 1));
6631 addInstr(env, ARM64Instr_CSel(dst, one, zero, cc));
6780 ARM64RIL* one = mb_mkARM64RIL_I(1);
6782 vassert(one);
6783 addInstr(env, ARM64Instr_Logic(r_res, hregARM64_X0(), one,
6786 addInstr(env, ARM64Instr_Logic(r_res, r_res, one,
