Lines Matching refs:rD
2860 //ZZ HReg rD = newVRegD(env);
2865 //ZZ Bool resRd; // is the result in rD or rM ?
2876 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, False));
2877 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_TRN, rD, rM, size, False));
2878 //ZZ return resRd ? rD : rM;
2886 //ZZ HReg rD = newVRegD(env);
2891 //ZZ Bool resRd; // is the result in rD or rM ?
2900 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, False));
2901 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_ZIP, rD, rM, size, False));
2902 //ZZ return resRd ? rD : rM;
2910 //ZZ HReg rD = newVRegD(env);
2915 //ZZ Bool resRd; // is the result in rD or rM ?
2924 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, False));
2925 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_UZP, rD, rM, size, False));
2926 //ZZ return resRd ? rD : rM;
5063 //ZZ HReg rD = newVRegV(env);
5068 //ZZ Bool resRd; // is the result in rD or rM ?
5079 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, True));
5080 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_TRN, rD, rM, size, True));
5081 //ZZ return resRd ? rD : rM;
5091 //ZZ HReg rD = newVRegV(env);
5096 rD or rM ?
5107 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, True));
5108 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_ZIP, rD, rM, size, True));
5109 //ZZ return resRd ? rD : rM;
5119 //ZZ HReg rD = newVRegV(env);
5124 //ZZ Bool resRd; // is the result in rD or rM ?
5135 //ZZ addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, True));
5136 //ZZ addInstr(env, ARMInstr_NDual(ARMneon_UZP, rD, rM, size, True));
5137 //ZZ return resRd ? rD : rM;
6012 HReg rD = newVRegD(env);
6014 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, rD, rN, offs));
6015 return rD;
6195 HReg rD = newVRegD(env);
6197 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, rD, rN, offs));
6198 return rD;
6337 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6339 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am));
6343 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6345 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am));
6349 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6351 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am));
6355 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6357 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am));
6380 //ZZ HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6384 //ZZ False/*!isSignedLoad*/, rD, am));
6388 //ZZ HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
6390 //ZZ addInstr(env, ARMInstr_LdSt8U(ARMcc_AL, False/*!isLoad*/, rD, am));
6445 //ZZ HReg rD = iselIntExpr_R(env, sg->data);
6449 //ZZ (cc, False/*!isLoad*/, rD, am));
6453 //ZZ HReg rD = iselIntExpr_R(env, sg->data);
6458 //ZZ False/*!isSignedLoad*/, rD, am));
6482 //ZZ HReg rD = lookupIRTemp(env, lg->dst);
6483 //ZZ addInstr(env, mk_iMOVds_RR(rD, rAlt));
6487 //ZZ (cc, True/*isLoad*/, rD, am));
6495 //ZZ HReg rD = lookupIRTemp(env, lg->dst);
6496 //ZZ addInstr(env, mk_iMOVds_RR(rD, rAlt));
6499 //ZZ addInstr(env, ARMInstr_Ld8S(cc, rD, am));
6503 //ZZ addInstr(env, ARMInstr_LdSt16(cc, True/*isLoad*/, sx, rD, am));
6519 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
6521 addInstr(env, ARM64Instr_LdSt64(False/*!isLoad*/, rD, am));
6525 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
6527 addInstr(env, ARM64Instr_LdSt32(False/*!isLoad*/, rD, am));
6531 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
6533 addInstr(env, ARM64Instr_LdSt16(False/*!isLoad*/, rD, am));
6537 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
6539 addInstr(env, ARM64Instr_LdSt8(False/*!isLoad*/, rD, am));
6586 //ZZ HReg rD = iselDblExpr(env, stmt->Ist.Put.data);
6587 //ZZ addInstr(env, ARMInstr_VLdStD(False/*!isLoad*/, rD, am));
6594 //ZZ HReg rD = iselFltExpr(env, stmt->Ist.Put.data);
6595 //ZZ addInstr(env, ARMInstr_VLdStS(False/*!isLoad*/, rD, am));
6610 HReg rD = iselIntExpr_R(env, stmt->Ist.WrTmp.data);
6611 addInstr(env, ARM64Instr_MovI(dst, rD));
6759 HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata);
6768 addInstr(env, ARM64Instr_MovI(hregARM64_X2(), rD));
