Lines Matching refs:X0001
2730 #define X0001 BITS4(0,0,0,1)
3001 case ARMalu_XOR: subopc = X0001; break;
3021 case ARMsh_SHR: subopc = X0001; break;
3026 instr |= XXXXX__X(X1110,X0001,X1010,X0000,rD, /* _ _ */ rM);
3037 instr = XXXXXXXX(X1110,X0001,X0110,X1111,
3038 rDst,X1111,X0001,rSrc);
3149 instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,0), iregNo(rN),
3156 instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
3163 instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
3194 instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
3407 instr = XXX___XX(i->ARMin.Call.cond, X0001, X0010, /*___*/
3437 instr = XXX___XX(ARMcc_AL, X0001, X0010, /*___*/
3614 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X0100,dM);
3617 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X1100,dM);
3641 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3646 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3896 opc = X0001 | (i->ARMin.NUnaryS.dst->index << 1);
3940 opc = X0001 | (i->ARMin.NUnaryS.src->index << 1);
3981 opc = X0001 | (i->ARMin.NUnaryS.src->index << 1);
4031 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regM, regD, X0001,
4244 regD, X0001, BITS4(1,Q,M,0), regM);
4248 regD, X0001, BITS4(0,Q,M,0), regM);
4278 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD, X0001,
4282 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD, X0001,
4286 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD, X0001,
4315 X0001, BITS4(N,Q,M,0), regM);
4319 X0001, BITS4(N,Q,M,0), regM);
4869 #undef X0001
