Lines Matching refs:tLo
1118 HReg tHi, tLo;
1121 iselInt64Expr(&tHi, &tLo, env, e->Iex.Unop.arg);
1122 addInstr(env, ARMInstr_Alu(ARMalu_OR, tmp, tHi, ARMRI84_R(tLo)));
1644 HReg tLo = newVRegI(env);
1646 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
1648 rLo = tLo;
1926 HReg tLo = newVRegI(env);
1929 addInstr(env, ARMInstr_Imm32(tLo, wLo));
1931 *rLo = tLo;
1939 HReg tLo = newVRegI(env);
1941 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
1943 *rLo = tLo;
1952 HReg tLo, tHi, rA;
1956 tLo = newVRegI(env);
1960 tLo, ARMAMode1_RI(rA, 0)));
1962 *rLo = tLo;
1971 HReg tLo = newVRegI(env);
1973 addInstr(env, ARMInstr_LdSt32(ARMcc_AL, True/*isLoad*/, tLo, am0));
1975 *rLo = tLo;
1989 HReg tLo = newVRegI(env);
1996 addInstr(env, mk_iMOVds_RR(tLo, hregARM_R0()));
1998 *rLo = tLo;
2005 HReg tLo = newVRegI(env);
2009 addInstr(env, ARMInstr_Alu(ARMalu_OR, tLo, xLo, ARMRI84_R(yLo)));
2011 *rLo = tLo;
2018 HReg tLo = newVRegI(env);
2021 addInstr(env, ARMInstr_Alu(ARMalu_ADDS, tLo, xLo, ARMRI84_R(yLo)));
2024 *rLo = tLo;
2059 HReg tLo = newVRegI(env);
2065 /* tLo = 0 - yLo, and set carry */
2067 tLo, zero, ARMRI84_R(yLo)));
2071 /* So now we have tHi:tLo = -arg. To finish off, or 'arg'
2073 tHi:tLo = arg | -arg. */
2075 addInstr(env, ARMInstr_Alu(ARMalu_OR, tLo, tLo, ARMRI84_R(yLo)));
2077 *rLo = tLo;
2149 HReg tLo = newVRegI(env);
2151 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
2153 *rLo = tLo;
