Lines Matching refs:HReg
53 void ppHRegMIPS(HReg reg, Bool mode64)
116 HReg hregMIPS_GPR0(Bool mode64)
121 HReg hregMIPS_GPR1(Bool mode64)
126 HReg hregMIPS_GPR2(Bool mode64)
131 HReg hregMIPS_GPR3(Bool mode64)
136 HReg hregMIPS_GPR4(Bool mode64)
141 HReg hregMIPS_GPR5(Bool mode64)
146 HReg hregMIPS_GPR6(Bool mode64)
151 HReg hregMIPS_GPR7(Bool mode64)
156 HReg hregMIPS_GPR8(Bool mode64)
161 HReg hregMIPS_GPR9(Bool mode64)
166 HReg hregMIPS_GPR10(Bool mode64)
171 HReg hregMIPS_GPR11(Bool mode64)
176 HReg hregMIPS_GPR12(Bool mode64)
181 HReg hregMIPS_GPR13(Bool mode64)
186 HReg hregMIPS_GPR14(Bool mode64)
191 HReg hregMIPS_GPR15(Bool mode64)
196 HReg hregMIPS_GPR16(Bool mode64)
201 HReg hregMIPS_GPR17(Bool mode64)
206 HReg hregMIPS_GPR18(Bool mode64)
211 HReg hregMIPS_GPR19(Bool mode64)
216 HReg hregMIPS_GPR20(Bool mode64)
221 HReg hregMIPS_GPR21(Bool mode64)
226 HReg hregMIPS_GPR22(Bool mode64)
231 HReg hregMIPS_GPR23(Bool mode64)
236 HReg hregMIPS_GPR24(Bool mode64)
241 HReg hregMIPS_GPR25(Bool mode64)
246 HReg hregMIPS_GPR26(Bool mode64)
251 HReg hregMIPS_GPR27(Bool mode64)
256 HReg hregMIPS_GPR28(Bool mode64)
261 HReg hregMIPS_GPR29(Bool mode64)
266 HReg hregMIPS_GPR30(Bool mode64)
271 HReg hregMIPS_GPR31(Bool mode64)
276 HReg hregMIPS_F0(Bool mode64)
281 HReg hregMIPS_F1(Bool mode64)
286 HReg hregMIPS_F2(Bool mode64)
291 HReg hregMIPS_F3(Bool mode64)
296 HReg hregMIPS_F4(Bool mode64)
301 HReg hregMIPS_F5(Bool mode64)
306 HReg hregMIPS_F6(Bool mode64)
311 HReg hregMIPS_F7(Bool mode64)
316 HReg hregMIPS_F8(Bool mode64)
321 HReg hregMIPS_F9(Bool mode64)
326 HReg hregMIPS_F10(Bool mode64)
331 HReg hregMIPS_F11(Bool mode64)
336 HReg hregMIPS_F12(Bool mode64)
341 HReg hregMIPS_F13(Bool mode64)
346 HReg hregMIPS_F14(Bool mode64)
351 HReg hregMIPS_F15(Bool mode64)
356 HReg hregMIPS_F16(Bool mode64)
361 HReg hregMIPS_F17(Bool mode64)
366 HReg hregMIPS_F18(Bool mode64)
371 HReg hregMIPS_F19(Bool mode64)
376 HReg hregMIPS_F20(Bool mode64)
381 HReg hregMIPS_F21(Bool mode64)
386 HReg hregMIPS_F22(Bool mode64)
391 HReg hregMIPS_F23(Bool mode64)
396 HReg hregMIPS_F24(Bool mode64)
401 HReg hregMIPS_F25(Bool mode64)
406 HReg hregMIPS_F26(Bool mode64)
411 HReg hregMIPS_F27(Bool mode64)
416 HReg hregMIPS_F28(Bool mode64)
421 HReg hregMIPS_F29(Bool mode64)
426 HReg hregMIPS_F30(Bool mode64)
431 HReg hregMIPS_F31(Bool mode64)
436 HReg hregMIPS_PC(Bool mode64)
441 HReg hregMIPS_HI(Bool mode64)
446 HReg hregMIPS_LO(Bool mode64)
451 HReg hregMIPS_D0(void)
456 HReg hregMIPS_D1(void)
461 HReg hregMIPS_D2(void)
466 HReg hregMIPS_D3(void)
471 HReg hregMIPS_D4(void)
476 HReg hregMIPS_D5(void)
481 HReg hregMIPS_D6(void)
486 HReg hregMIPS_D7(void)
491 HReg hregMIPS_D8(void)
496 HReg hregMIPS_D9(void)
501 HReg hregMIPS_D10(void)
506 HReg hregMIPS_D11(void)
511 HReg hregMIPS_D12(void)
516 HReg hregMIPS_D13(void)
521 HReg hregMIPS_D14(void)
526 HReg hregMIPS_D15(void)
531 HReg hregMIPS_FIR(void)
536 HReg hregMIPS_FCCR(void)
541 HReg hregMIPS_FEXR(void)
546 HReg hregMIPS_FENR(void)
551 HReg hregMIPS_FCSR(void)
556 HReg hregMIPS_COND(void)
561 void getAllocableRegs_MIPS(Int * nregs, HReg ** arr, Bool mode64)
571 *arr = LibVEX_Alloc(*nregs * sizeof(HReg));
872 MIPSAMode *MIPSAMode_IR(Int idx, HReg base)
882 MIPSAMode *MIPSAMode_RR(HReg idx, HReg base)
1019 MIPSRH *MIPSRH_Reg(HReg reg)
1181 MIPSInstr *MIPSInstr_LI(HReg dst, ULong imm)
1190 MIPSInstr *MIPSInstr_Alu(MIPSAluOp op, HReg dst, HReg srcL, MIPSRH * srcR)
1201 MIPSInstr *MIPSInstr_Shft(MIPSShftOp op, Bool sz32, HReg dst, HReg srcL,
1214 MIPSInstr *MIPSInstr_Unary(MIPSUnaryOp op, HReg dst, HReg src)
1224 MIPSInstr *MIPSInstr_Cmp(Bool syned, Bool sz32, HReg dst, HReg srcL, HReg srcR,
1239 MIPSInstr *MIPSInstr_Mul(Bool syned, Bool wid, Bool sz32, HReg dst, HReg srcL,
1240 HReg srcR)
1254 MIPSInstr *MIPSInstr_Msub(Bool syned, HReg srcL, HReg srcR)
1267 MIPSInstr *MIPSInstr_Madd(Bool syned, HReg srcL, HReg srcR)
1280 MIPSInstr *MIPSInstr_Div(Bool syned, Bool sz32, HReg srcL, HReg srcR)
1292 HReg src, RetLoc rloc )
1339 MIPSInstr *MIPSInstr_XIndir ( HReg dstGA, MIPSAMode* amPC,
1349 MIPSInstr *MIPSInstr_XAssisted ( HReg dstGA, MIPSAMode* amPC,
1360 MIPSInstr *MIPSInstr_Load(UChar sz, HReg dst, MIPSAMode * src, Bool mode64)
1374 MIPSInstr *MIPSInstr_Store(UChar sz, MIPSAMode * dst, HReg src, Bool mode64)
1388 MIPSInstr *MIPSInstr_LoadL(UChar sz, HReg dst, MIPSAMode * src, Bool mode64)
1402 MIPSInstr *MIPSInstr_StoreC(UChar sz, MIPSAMode * dst, HReg src, Bool mode64)
1416 MIPSInstr *MIPSInstr_Mthi(HReg src)
1424 MIPSInstr *MIPSInstr_Mtlo(HReg src)
1432 MIPSInstr *MIPSInstr_Mfhi(HReg dst)
1440 MIPSInstr *MIPSInstr_Mflo(HReg dst)
1449 MIPSInstr *MIPSInstr_RdWrLR(Bool wrLR, HReg gpr)
1458 MIPSInstr *MIPSInstr_FpLdSt(Bool isLoad, UChar sz, HReg reg, MIPSAMode * addr)
1470 MIPSInstr *MIPSInstr_FpUnary(MIPSFpOp op, HReg dst, HReg src)
1480 MIPSInstr *MIPSInstr_FpBinary(MIPSFpOp op, HReg dst, HReg srcL, HReg srcR)
1491 HReg dst, HReg src1, HReg src2,
1492 HReg src3 )
1504 MIPSInstr *MIPSInstr_FpConvert(MIPSFpOp op, HReg dst, HReg src)
1515 MIPSInstr *MIPSInstr_FpCompare(MIPSFpOp op, HReg dst, HReg srcL, HReg srcR)
1526 MIPSInstr *MIPSInstr_MtFCSR(HReg src)
1534 MIPSInstr *MIPSInstr_MfFCSR(HReg dst)
1542 MIPSInstr *MIPSInstr_FpGpMove ( MIPSFpGpMoveOp op, HReg dst, HReg src )
1552 MIPSInstr *MIPSInstr_MoveCond ( MIPSMoveCondOp op, HReg dst, HReg src,
1553 HReg cond )
1580 static void ppLoadImm(HReg dst, ULong imm, Bool mode64)
1594 HReg r_srcL = i->Min.Alu.srcL;
1607 HReg r_srcL = i->Min.Shft.srcL;
2137 static void mapReg(HRegRemap * m, HReg * r)
2295 Bool isMove_MIPSInstr(MIPSInstr * i, HReg * src, HReg * dst)
2316 void genSpill_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg,
2348 void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg,
2382 static UInt iregNo(HReg r, Bool mode64)
2392 static UChar fregNo(HReg r, Bool mode64)
2401 static UChar dregNo(HReg r)
