Lines Matching refs:tLo
1077 HReg tLo = newVRegI(env);
1093 addInstr(env, MIPSInstr_Mflo(tLo));
1099 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1194 HReg tLo = newVRegI(env);
1207 addInstr(env, MIPSInstr_Mflo(tLo));
1213 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1225 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1245 and tLo_1, tLo, mask
1249 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1259 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1269 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
2195 HReg tLo = newVRegI(env);
2204 addInstr(env, MIPSInstr_Mflo(tLo));
2206 *rLo = tLo;
2219 HReg tLo = newVRegI(env);
2225 addInstr(env, MIPSInstr_Mflo(tLo));
2227 *rLo = tLo;
2238 HReg tLo = newVRegI(env);
2244 addInstr(env, MIPSInstr_Mflo(tLo));
2246 *rLo = tLo;
2290 HReg tLo = newVRegI(env);
2294 addInstr(env, MIPSInstr_Load(4, tLo, MIPSAMode_IR(4, r_addr), mode64));
2296 *rLo = tLo;
2305 HReg tLo = newVRegI(env);
2311 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
2312 *rHi = tLo;
2313 *rLo = tLo;
2316 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
2318 *rLo = tLo;
2326 HReg tLo = newVRegI(env);
2331 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2334 *rLo = tLo;
2377 HReg tLo = newVRegI(env);
2386 addInstr(env, MIPSInstr_Alu(Malu_ADD, tLo, xLo, MIPSRH_Reg(yLo)));
2389 addInstr(env, MIPSInstr_Cmp(False, size32, carryBit, tLo, xLo, cc));
2396 *rLo = tLo;
2405 HReg tLo = newVRegI(env);
2412 addInstr(env, MIPSInstr_Alu(Malu_SUB, tLo, xLo, MIPSRH_Reg(yLo)));
2422 *rLo = tLo;
2427 HReg tLo = newVRegI(env);
2438 addInstr(env, MIPSInstr_Mflo(tLo));
2440 *rLo = tLo;
2447 HReg tLo = newVRegI(env);
2455 addInstr(env, MIPSInstr_Mflo(tLo));
2457 *rLo = tLo;
2473 HReg tLo = newVRegI(env);
2480 addInstr(env, MIPSInstr_Alu(op, tLo, xLo, MIPSRH_Reg(yLo)));
2482 *rLo = tLo;
2758 HReg tLo = newVRegI(env);
2775 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2780 addInstr(env, MIPSInstr_Load(4, tLo, nextMIPSAModeFloat(am_addr),
2788 *rLo = tLo;
2802 HReg tLo = newVRegI(env);
2813 addInstr(env, mk_iMOVds_RR(tLo, tmp));
2816 *rLo = tLo;
2822 HReg tLo = newVRegI(env);
2826 addInstr(env, mk_iMOVds_RR(tLo, src));
2830 *rLo = tLo;
2836 HReg tLo = newVRegI(env);
2839 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo, src,
2844 *rLo = tLo;
2850 HReg tLo = newVRegI(env);
2853 addInstr(env, mk_iMOVds_RR(tLo, src));
2857 *rLo = tLo;
2864 HReg tLo = newVRegI(env);
2884 tHi:tLo = arg | -arg. */
2886 addInstr(env, MIPSInstr_Alu(Malu_OR, tLo, yLo, MIPSRH_Reg(tmp2)));
2888 *rLo = tLo;
2915 HReg tLo = newVRegI(env);
2928 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2933 addInstr(env, MIPSInstr_Load(4, tLo, nextMIPSAModeFloat(am_addr),
2941 *rLo = tLo;
