Lines Matching refs:Hit
41 - both blocks hit --> one hit
133 typedef enum { Hit = 0, Miss, MissDirty } CacheResult;
237 * For simple cache hit/miss counts, we do not have to
259 return Hit;
269 return Hit;
305 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit;
312 return Hit;
318 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit;
319 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit;
326 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit;
327 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit;
366 return Hit;
377 return Hit;
413 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit;
419 return Hit;
426 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit;
428 case Hit: return LL_Hit;
438 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit;
440 case Hit: return LL_Hit;
450 if ( cachesim_ref( &D1, a, size) == Hit ) {
451 /* Even for a L1 hit, the write-trough L1 passes
453 * But this causes no latency, so return the hit.
459 case Hit: return LL_Hit;
533 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit;
535 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit;
542 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit;
544 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit;
554 if ( cachesim_ref( &I1, a, size) == Hit
557 case Hit: return LL_Hit;
567 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit;
570 case Hit: return LL_Hit;
581 if ( cachesim_ref( &D1, a, size) == Hit ) {
582 /* Even for a L1 hit, the write-trough L1 passes
584 * But this causes no latency, so return the hit.
590 case Hit: return LL_Hit;
731 CLG_DEBUG(6," Hit%d [idx %d] (line %#lx from %#lx): %x => %08x, count %d\n",\
751 Int miss1=0, miss2=0; /* 0: L1 hit, 1:L1 miss, 2:LL miss */ \
773 CLG_DEBUG(6," Hit%d [idx %d] (line %#lx from %#lx): %x => %08x, count %d\n",\
810 CLG_DEBUG(6," Hit%d [idx %d] (line %#lx from %#lx): %x => %08x, count %d\n",\
913 CLG_DEBUG(6," Hit%d [idx %d] (line %#lx from %#lx): => %08x, count %d\n",
1052 case L1_Hit: return "L1 Hit ";
1053 case LL_Hit: return "LL Hit ";
