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Searched
defs:PhysReg
(Results
1 - 8
of
8
) sorted by null
/external/llvm/lib/CodeGen/
LiveRegMatrix.cpp
75
void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned
PhysReg
) {
77
<< " to " << PrintReg(
PhysReg
, TRI) << ':');
79
VRM->assignVirt2Phys(VirtReg.reg,
PhysReg
);
80
MRI->setPhysRegUsed(
PhysReg
);
81
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units) {
90
unsigned
PhysReg
= VRM->getPhys(VirtReg.reg);
92
<< " from " << PrintReg(
PhysReg
, TRI) << ':');
94
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units) {
103
unsigned
PhysReg
) {
114
// The BitVector is indexed by
PhysReg
, not register unit
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...]
RegisterClassInfo.cpp
98
unsigned
PhysReg
= RawOrder[i];
100
if (Reserved.test(
PhysReg
))
102
unsigned Cost = TRI->getCostPerUse(
PhysReg
);
105
if (CSRNum[
PhysReg
])
106
//
PhysReg
aliases a CSR, save it for later.
107
CSRAlias.push_back(
PhysReg
);
111
RCI.Order[N++] =
PhysReg
;
120
unsigned
PhysReg
= CSRAlias[i];
121
unsigned Cost = TRI->getCostPerUse(
PhysReg
);
124
RCI.Order[N++] =
PhysReg
;
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...]
InterferenceCache.h
39
/// of
PhysReg
in all basic blocks.
41
///
PhysReg
- The register currently represented.
42
unsigned
PhysReg
;
63
/// RegUnitInfo - Information tracked about each RegUnit in
PhysReg
.
86
/// Info for each RegUnit in
PhysReg
. It is very rare ofr a
PHysReg
to have
97
Entry() :
PhysReg
(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {}
101
PhysReg
= 0;
107
unsigned getPhysReg() const { return
PhysReg
; }
115
/// valid - Return true if this is a valid entry for
physReg
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...]
VirtRegMap.cpp
250
// assigned
PhysReg
must be marked as live-in to those blocks.
251
unsigned
PhysReg
= VRM->getPhys(VirtReg);
252
assert(
PhysReg
!= VirtRegMap::NO_PHYS_REG && "Unmapped virtual register.");
260
if (!LiveIn[i]->isLiveIn(
PhysReg
))
261
LiveIn[i]->addLiveIn(
PhysReg
);
327
// If we encounter a VirtReg or
PhysReg
then get at the
PhysReg
and add
328
// it to the
physreg
bitset. Later we use only the PhysRegs that were
339
unsigned
PhysReg
= VRM->getPhys(VirtReg);
340
assert(
PhysReg
!= VirtRegMap::NO_PHYS_REG &
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...]
RegAllocFast.cpp
74
unsigned
PhysReg
; // Currently held here.
79
: LastUse(nullptr), VirtReg(v),
PhysReg
(0), LastOpNum(0), Dirty(false){}
124
// Mark a
physreg
as used in this instruction.
125
void markRegUsedInInstr(unsigned
PhysReg
) {
126
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units)
130
// Check if a
physreg
or any of its aliases are used in this instruction.
131
bool isRegUsedInInstr(unsigned
PhysReg
) const {
132
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units)
178
void definePhysReg(MachineInstr *MI, unsigned
PhysReg
, RegState NewState);
179
unsigned calcSpillCost(unsigned
PhysReg
) const
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...]
RegAllocGreedy.cpp
248
unsigned
PhysReg
;
253
// Interference for
PhysReg
.
261
PhysReg
= Reg;
281
/// Candidate info for each
PhysReg
in AllocationOrder.
338
unsigned canReassign(LiveInterval &VirtReg, unsigned
PhysReg
);
343
bool mayRecolorAllInterferences(unsigned
PhysReg
, LiveInterval &VirtReg,
365
unsigned
PhysReg
, unsigned &CostPerUseLimit,
572
unsigned
PhysReg
;
573
while ((
PhysReg
= Order.next()))
574
if (!Matrix->checkInterference(VirtReg,
PhysReg
))
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...]
/external/llvm/lib/CodeGen/SelectionDAG/
FunctionLoweringInfo.cpp
129
std::pair<unsigned, const TargetRegisterClass*>
PhysReg
=
132
if (
PhysReg
.first == SP)
/external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp
373
struct PhysRegOp
PhysReg
;
696
return
PhysReg
.Num;
880
OS << "
PhysReg
<" <<
PhysReg
.Num << ">";
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...]
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