| /external/pcre/dist/sljit/ |
| sljitNativeARM_32.c | 39 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
263 return push_inst(compiler, BLX | RM(TMP_REG1));
484 inst[1] = BLX | RM(TMP_REG1);
991 SLJIT_ASSERT(src1 == TMP_REG1); \
1006 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1019 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
[all...] |
| sljitNativeARM_64.c | 37 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
518 /* dst must be register, TMP_REG1
519 arg1 must be register, TMP_REG1, imm
533 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
534 arg1 = TMP_REG1;
552 SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
655 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
656 arg1 = TMP_REG1;
667 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
673 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
[all...] |
| sljitNativeARM_T2_32.c | 36 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
513 /* dst must be register, TMP_REG1
514 arg1 must be register, TMP_REG1, imm
522 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
523 arg1 = TMP_REG1;
536 SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
672 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
673 arg1 = TMP_REG1;
687 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
693 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
[all...] |
| sljitNativeMIPS_common.c | 47 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
574 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
576 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_SP)));
643 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
644 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
645 base = S(TMP_REG1);
670 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_SP), UNMOVABLE_INS);
771 tmp_ar = DR(TMP_REG1);
[all...] |
| sljitNativePPC_common.c | 90 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
969 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
972 tmp_r = TMP_REG1;
[all...] |
| sljitNativeSPARC_common.c | 86 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
444 FAIL_IF(load_immediate(compiler, TMP_REG1, -local_size));
445 FAIL_IF(push_inst(compiler, SAVE | D(SLJIT_SP) | S1(SLJIT_SP) | S2(TMP_REG1), UNMOVABLE_INS));
595 arg2 = TMP_REG1;
616 arg2 = TMP_REG1;
652 /* arg1 goes to TMP_REG1 or src reg
655 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
676 else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, TMP_REG1, dst, dstw))
705 FAIL_IF(load_immediate(compiler, TMP_REG1, src1w));
706 src1_r = TMP_REG1;
[all...] |
| sljitNativeX86_common.c | 67 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
83 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
660 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, src, srcw);
707 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, src, srcw);
710 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, dst, dstw);
752 && reg_map[TMP_REG1] > 7,
758 && reg_map[TMP_REG1] == 2,
767 EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_R1, 0);
770 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, TMP_REG1, 0)
[all...] |
| sljitNativeTILEGX_64.c | 46 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
[all...] |
