| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister(
293 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
305 MIB.addReg(TmpReg, getKillRegState(true))
308 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true));
|
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | 386 unsigned TmpReg = createResultReg(RC);
387 EmitInst(Mips::LUi, TmpReg).addImm(Hi);
388 EmitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo);
|
| MipsSEInstrInfo.cpp | 494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg;
503 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo);
508 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
509 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | [all...] |
| PPCFastISel.cpp | 879 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass);
880 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned))
882 SrcReg = TmpReg;
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 253 unsigned BaseReg, IndexReg, TmpReg, Scale;
262 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0),
358 BaseReg = TmpReg;
361 IndexReg = TmpReg;
395 BaseReg = TmpReg;
398 IndexReg = TmpReg;
428 TmpReg = Reg;
484 IndexReg = TmpReg;
573 BaseReg = TmpReg;
576 IndexReg = TmpReg;
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
