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      1 #include "hw/hw.h"
      2 #include "hw/mips/mips.h"
      3 #include "cpu.h"
      4 
      5 /* Raise IRQ to CPU if necessary. It must be called every time the active
      6    IRQ may change */
      7 void cpu_mips_update_irq(CPUOldState *env)
      8 {
      9     CPUState *cpu = ENV_GET_CPU(env);
     10 
     11     if ((env->CP0_Status & (1 << CP0St_IE)) &&
     12         !(env->CP0_Status & (1 << CP0St_EXL)) &&
     13         !(env->CP0_Status & (1 << CP0St_ERL)) &&
     14         !(env->hflags & MIPS_HFLAG_DM)) {
     15         if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
     16             !(cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
     17             cpu_interrupt(cpu, CPU_INTERRUPT_HARD);
     18         }
     19     } else
     20         cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
     21 }
     22 
     23 static void cpu_mips_irq_request(void *opaque, int irq, int level)
     24 {
     25     CPUOldState *env = (CPUOldState *)opaque;
     26 
     27     if (irq < 0 || irq > 7)
     28         return;
     29 
     30     if (level) {
     31         env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
     32     } else {
     33         env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
     34     }
     35     cpu_mips_update_irq(env);
     36 }
     37 
     38 void cpu_mips_irq_init_cpu(CPUOldState *env)
     39 {
     40     qemu_irq *qi;
     41     int i;
     42 
     43     qi = qemu_allocate_irqs(cpu_mips_irq_request, env, 8);
     44     for (i = 0; i < 8; i++) {
     45         env->irq[i] = qi[i];
     46     }
     47 }
     48