| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /external/libvorbis/lib/ |
| lsp.c | 47 any machine with an FPU. The integer implementation is *not* fixed
69 vorbis_fpu_control fpu; local
71 vorbis_fpu_setround(&fpu);
112 vorbis_fpu_restore(fpu);
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| vorbisfile.c | 1880 vorbis_fpu_control fpu; local
[all...] |
| /external/lldb/source/Plugins/Process/Utility/ |
| RegisterContextDarwin_i386.h | 94 struct FPU
135 FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
147 FPU fpu; member in class:RegisterContextDarwin_i386
236 DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
245 DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| RegisterContextDarwin_arm.h | 122 struct FPU
178 FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
191 FPU fpu; member in class:RegisterContextDarwin_arm
294 DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
306 DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| RegisterContextDarwin_x86_64.h | 98 struct FPU
139 FPUWordCount = sizeof(FPU)/sizeof(uint32_t),
151 FPU fpu; member in class:RegisterContextDarwin_x86_64
240 DoReadFPU (lldb::tid_t tid, int flavor, FPU &fpu) = 0;
249 DoWriteFPU (lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| /external/lldb/tools/debugserver/source/MacOSX/i386/ |
| DNBArchImplI386.h | 65 typedef __i386_float_state_t FPU;
97 e_regSetWordSizeFPU = sizeof(FPU) / sizeof(int),
114 FPU no_avx;
116 } fpu; member in struct:DNBArchImplI386::Context
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| /external/lldb/tools/debugserver/source/MacOSX/x86_64/ |
| DNBArchImplX86_64.h | 64 typedef __x86_64_float_state_t FPU;
96 e_regSetWordSizeFPU = sizeof(FPU) / sizeof(int),
113 FPU no_avx;
115 } fpu; member in struct:DNBArchImplX86_64::Context
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| /external/valgrind/main/coregrind/m_coredump/ |
| coredump-elf.c | 393 static void fill_fpu(const ThreadState *tst, vki_elf_fpregset_t *fpu)
399 //:: static void fill_fpu(vki_elf_fpregset_t *fpu, const HChar *from)
406 //:: VG_(memcpy)(fpu, from, 7*sizeof(long));
408 //:: to = (UShort *)&fpu->st_space[0];
414 //:: VG_(memcpy)(fpu, from, sizeof(*fpu));
417 //:: fill_fpu(fpu, (const HChar *)&arch->m_sse);
420 //:: fpu->cwd = ?;
421 //:: fpu->swd = ?;
422 //:: fpu->twd = ?
597 vki_elf_fpregset_t fpu; local
[all...] |
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 65 struct mips_fpu_struct fpu; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /external/qemu/target-i386/ |
| kvm.c | 373 struct kvm_fpu fpu; local
376 memset(&fpu, 0, sizeof fpu);
377 fpu.fsw = env->fpus & ~(7 << 11);
378 fpu.fsw |= (env->fpstt & 7) << 11;
379 fpu.fcw = env->fpuc;
381 fpu.ftwx |= (!env->fptags[i]) << i;
382 memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
383 memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
384 fpu.mxcsr = env->mxcsr
479 struct kvm_fpu fpu; local
[all...] |
| hax-all.c | 991 struct fx_layout fpu; local
994 ret = hax_sync_fpu(ENV_GET_CPU(env), &fpu, 0);
998 env->fpstt = (fpu.fsw >> 11) & 7;
999 env->fpus = fpu.fsw;
1000 env->fpuc = fpu.fcw;
1002 env->fptags[i] = !((fpu.ftw >> i) & 1);
1003 memcpy(env->fpregs, fpu.st_mm, sizeof(env->fpregs));
1005 memcpy(env->xmm_regs, fpu.mmx_1, sizeof(fpu.mmx_1));
1006 memcpy((XMMReg *)(env->xmm_regs) + 8, fpu.mmx_2, sizeof(fpu.mmx_2))
1014 struct fx_layout fpu; local
[all...] |
