| /device/asus/flo/camera/QCamera2/HAL/ |
| QCameraThermalAdapter.cpp | 155 qcamera_thermal_level_enum_t lvl = (qcamera_thermal_level_enum_t) level; local
157 rc = instance.mCallback->thermalEvtHandle(lvl, userdata, data);
|
| /device/lge/hammerhead/camera/QCamera2/HAL/ |
| QCameraThermalAdapter.cpp | 155 qcamera_thermal_level_enum_t lvl = (qcamera_thermal_level_enum_t) level; local
157 rc = instance.mCallback->thermalEvtHandle(lvl, userdata, data);
|
| /device/moto/shamu/camera/QCamera2/HAL/ |
| QCameraThermalAdapter.cpp | 156 qcamera_thermal_level_enum_t lvl = (qcamera_thermal_level_enum_t) level; local
158 rc = instance.mCallback->thermalEvtHandle(lvl, userdata, data);
|
| /external/linux-tools-perf/perf-3.12.0/tools/perf/arch/x86/util/ |
| header.c | 25 unsigned int a, b, c, d, lvl; local
30 cpuid(0, &lvl, &b, &c, &d);
36 if (lvl >= 1) {
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ |
| loopfilter.h | 49 unsigned char lvl[4][4][4]; member in struct:__anon17682
|
| /external/libvpx/libvpx/vp8/common/ |
| loopfilter.h | 49 unsigned char lvl[4][4][4]; member in struct:__anon29459
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ |
| loopfilter.h | 49 unsigned char lvl[4][4][4]; member in struct:__anon40642
|
| /external/chromium_org/third_party/mesa/src/src/mesa/main/ |
| texcompress_cpal.c | 116 int lvl; local
128 for (lvl = 0; lvl < num_levels; lvl++) {
129 w = width >> lvl;
132 h = height >> lvl;
172 GLint lvl, num_levels; local
192 for (lvl = 0; lvl < num_levels; lvl++)
[all...] |
| /external/mesa3d/src/mesa/main/ |
| texcompress_cpal.c | 116 int lvl; local
128 for (lvl = 0; lvl < num_levels; lvl++) {
129 w = width >> lvl;
132 h = height >> lvl;
172 GLint lvl, num_levels; local
192 for (lvl = 0; lvl < num_levels; lvl++)
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/ |
| vp9_loopfilter.h | 60 uint8_t lvl[MAX_SEGMENTS][MAX_REF_FRAMES][MAX_MODE_LF_DELTAS]; member in struct:__anon17751
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
| nv50_miptree.c | 224 struct nv50_miptree_level *lvl = &mt->level[l]; local
229 lvl->offset = mt->total_size;
231 lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d);
233 tsx = NV50_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
234 tsy = NV50_TILE_SIZE_Y(lvl->tile_mode);
235 tsz = NV50_TILE_SIZE_Z(lvl->tile_mode);
237 lvl->pitch = align(nbx * blocksize, tsx);
239 mt->total_size += lvl->pitch * align(nby, tsy) * align(d, tsz);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
| nvc0_miptree.c | 229 struct nv50_miptree_level *lvl = &mt->level[l]; local
234 lvl->offset = mt->total_size;
236 lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d);
238 tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
239 tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode);
240 tsz = NVC0_TILE_SIZE_Z(lvl->tile_mode);
242 lvl->pitch = align(nbx * blocksize, tsx);
244 mt->total_size += lvl->pitch * align(nby, tsy) * align(d, tsz);
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| radeon_state_init.c | 422 radeon_mipmap_level *lvl; local
442 lvl = &t->mt->levels[0];
445 OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
458 radeon_mipmap_level *lvl; local
481 lvl = &t->mt->levels[t->minLod];
482 OUT_BATCH_RELOC(lvl->faces[5].offset, t->mt->bo, lvl->faces[5].offset,
[all...] |
| radeon_mipmap_tree.c | 130 radeon_mipmap_level *lvl = &mt->levels[level]; local
133 height = _mesa_next_pow_two_32(lvl->height);
135 lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt->target);
136 lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebits);
138 assert(lvl->size > 0);
140 lvl->faces[face].offset = *curOffset;
141 *curOffset += lvl->size
303 radeon_mipmap_level *lvl; local
[all...] |
| radeon_texture.c | 160 radeon_mipmap_level *lvl; local
169 lvl = &image->mt->levels[image->base.Base.Level];
171 image->base.Map = image->mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
172 image->base.RowStride = lvl->rowstride / _mesa_get_format_bytes(image->base.Base.TexFormat);
252 radeon_mipmap_level *lvl = &image->mt->levels[texImage->Level]; local
255 base = mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
257 *stride = lvl->rowstride;
712 radeon_mipmap_level *lvl; local
723 lvl = &image->mt->levels[level];
725 rs = lvl->rowstride / texel_size
[all...] |
| /external/libvpx/libvpx/vp9/common/ |
| vp9_loopfilter.h | 60 uint8_t lvl[MAX_SEGMENTS][MAX_REF_FRAMES][MAX_MODE_LF_DELTAS]; member in struct:__anon29528
|
| /external/mesa3d/src/gallium/drivers/nv50/ |
| nv50_miptree.c | 224 struct nv50_miptree_level *lvl = &mt->level[l]; local
229 lvl->offset = mt->total_size;
231 lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d);
233 tsx = NV50_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
234 tsy = NV50_TILE_SIZE_Y(lvl->tile_mode);
235 tsz = NV50_TILE_SIZE_Z(lvl->tile_mode);
237 lvl->pitch = align(nbx * blocksize, tsx);
239 mt->total_size += lvl->pitch * align(nby, tsy) * align(d, tsz);
|
| /external/mesa3d/src/gallium/drivers/nvc0/ |
| nvc0_miptree.c | 229 struct nv50_miptree_level *lvl = &mt->level[l]; local
234 lvl->offset = mt->total_size;
236 lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d);
238 tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
239 tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode);
240 tsz = NVC0_TILE_SIZE_Z(lvl->tile_mode);
242 lvl->pitch = align(nbx * blocksize, tsx);
244 mt->total_size += lvl->pitch * align(nby, tsy) * align(d, tsz);
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_state_init.c | 422 radeon_mipmap_level *lvl; local
442 lvl = &t->mt->levels[0];
445 OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
458 radeon_mipmap_level *lvl; local
481 lvl = &t->mt->levels[t->minLod];
482 OUT_BATCH_RELOC(lvl->faces[5].offset, t->mt->bo, lvl->faces[5].offset,
[all...] |
| radeon_mipmap_tree.c | 130 radeon_mipmap_level *lvl = &mt->levels[level]; local
133 height = _mesa_next_pow_two_32(lvl->height);
135 lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt->target);
136 lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebits);
138 assert(lvl->size > 0);
140 lvl->faces[face].offset = *curOffset;
141 *curOffset += lvl->size
303 radeon_mipmap_level *lvl; local
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/ |
| vp9_loopfilter.h | 60 uint8_t lvl[MAX_SEGMENTS][MAX_REF_FRAMES][MAX_MODE_LF_DELTAS]; member in struct:__anon40711
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/ |
| nv30_miptree.c | 40 struct nv30_miptree_level *lvl = &mt->level[level]; local
43 return (layer * mt->layer_size) + lvl->offset;
45 return lvl->offset + (layer * lvl->zslice_size);
93 struct nv30_miptree_level *lvl = &mt->level[level]; local
108 rect->pitch = lvl->pitch;
323 struct nv30_miptree_level *lvl = &mt->level[l]; local
327 lvl->offset = size;
328 lvl->pitch = mt->uniform_pitch;
329 if (!lvl->pitch
403 struct nv30_miptree_level *lvl = &mt->level[tmpl->u.tex.level]; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_state_init.c | 598 radeon_mipmap_level *lvl; local
606 lvl = &t->mt->levels[0];
609 OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
[all...] |
| /external/mesa3d/src/gallium/drivers/nv30/ |
| nv30_miptree.c | 40 struct nv30_miptree_level *lvl = &mt->level[level]; local
43 return (layer * mt->layer_size) + lvl->offset;
45 return lvl->offset + (layer * lvl->zslice_size);
93 struct nv30_miptree_level *lvl = &mt->level[level]; local
108 rect->pitch = lvl->pitch;
323 struct nv30_miptree_level *lvl = &mt->level[l]; local
327 lvl->offset = size;
328 lvl->pitch = mt->uniform_pitch;
329 if (!lvl->pitch
403 struct nv30_miptree_level *lvl = &mt->level[tmpl->u.tex.level]; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_state_init.c | 598 radeon_mipmap_level *lvl; local
606 lvl = &t->mt->levels[0];
609 OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
[all...] |
