1 ; RUN: opt < %s -instcombine -S | FileCheck %s 2 3 ; CHECK-LABEL: @sdiv1( 4 ; CHECK: sdiv i32 %x, 8 5 define i32 @sdiv1(i32 %x) { 6 %y = sdiv i32 %x, 8 7 ret i32 %y 8 } 9 10 ; CHECK-LABEL: @sdiv2( 11 ; CHECK: ashr exact i32 %x, 3 12 define i32 @sdiv2(i32 %x) { 13 %y = sdiv exact i32 %x, 8 14 ret i32 %y 15 } 16 17 ; CHECK-LABEL: @sdiv3( 18 ; CHECK: %y = srem i32 %x, 3 19 ; CHECK: %z = sub i32 %x, %y 20 ; CHECK: ret i32 %z 21 define i32 @sdiv3(i32 %x) { 22 %y = sdiv i32 %x, 3 23 %z = mul i32 %y, 3 24 ret i32 %z 25 } 26 27 ; CHECK-LABEL: @sdiv4( 28 ; CHECK: ret i32 %x 29 define i32 @sdiv4(i32 %x) { 30 %y = sdiv exact i32 %x, 3 31 %z = mul i32 %y, 3 32 ret i32 %z 33 } 34 35 ; CHECK: i32 @sdiv5 36 ; CHECK: %y = srem i32 %x, 3 37 ; CHECK: %z = sub i32 %y, %x 38 ; CHECK: ret i32 %z 39 define i32 @sdiv5(i32 %x) { 40 %y = sdiv i32 %x, 3 41 %z = mul i32 %y, -3 42 ret i32 %z 43 } 44 45 ; CHECK-LABEL: @sdiv6( 46 ; CHECK: %z = sub i32 0, %x 47 ; CHECK: ret i32 %z 48 define i32 @sdiv6(i32 %x) { 49 %y = sdiv exact i32 %x, 3 50 %z = mul i32 %y, -3 51 ret i32 %z 52 } 53 54 ; CHECK-LABEL: @udiv1( 55 ; CHECK: ret i32 %x 56 define i32 @udiv1(i32 %x, i32 %w) { 57 %y = udiv exact i32 %x, %w 58 %z = mul i32 %y, %w 59 ret i32 %z 60 } 61 62 ; CHECK-LABEL: @udiv2( 63 ; CHECK: %z = lshr exact i32 %x, %w 64 ; CHECK: ret i32 %z 65 define i32 @udiv2(i32 %x, i32 %w) { 66 %y = shl i32 1, %w 67 %z = udiv exact i32 %x, %y 68 ret i32 %z 69 } 70 71 ; CHECK-LABEL: @ashr1( 72 ; CHECK: %B = ashr exact i64 %A, 2 73 ; CHECK: ret i64 %B 74 define i64 @ashr1(i64 %X) nounwind { 75 %A = shl i64 %X, 8 76 %B = ashr i64 %A, 2 ; X/4 77 ret i64 %B 78 } 79 80 ; PR9120 81 ; CHECK-LABEL: @ashr_icmp1( 82 ; CHECK: %B = icmp eq i64 %X, 0 83 ; CHECK: ret i1 %B 84 define i1 @ashr_icmp1(i64 %X) nounwind { 85 %A = ashr exact i64 %X, 2 ; X/4 86 %B = icmp eq i64 %A, 0 87 ret i1 %B 88 } 89 90 ; CHECK-LABEL: @ashr_icmp2( 91 ; CHECK: %Z = icmp slt i64 %X, 16 92 ; CHECK: ret i1 %Z 93 define i1 @ashr_icmp2(i64 %X) nounwind { 94 %Y = ashr exact i64 %X, 2 ; x / 4 95 %Z = icmp slt i64 %Y, 4 ; x < 16 96 ret i1 %Z 97 } 98 99 ; PR9998 100 ; Make sure we don't transform the ashr here into an sdiv 101 ; CHECK-LABEL: @pr9998( 102 ; CHECK: [[BIT:%[A-Za-z0-9.]+]] = and i32 %V, 1 103 ; CHECK-NEXT: [[CMP:%[A-Za-z0-9.]+]] = icmp ne i32 [[BIT]], 0 104 ; CHECK-NEXT: ret i1 [[CMP]] 105 define i1 @pr9998(i32 %V) nounwind { 106 entry: 107 %W = shl i32 %V, 31 108 %X = ashr exact i32 %W, 31 109 %Y = sext i32 %X to i64 110 %Z = icmp ugt i64 %Y, 7297771788697658747 111 ret i1 %Z 112 } 113 114 115 116 ; CHECK-LABEL: @udiv_icmp1( 117 ; CHECK: icmp ne i64 %X, 0 118 define i1 @udiv_icmp1(i64 %X) nounwind { 119 %A = udiv exact i64 %X, 5 ; X/5 120 %B = icmp ne i64 %A, 0 121 ret i1 %B 122 } 123 124 ; CHECK-LABEL: @sdiv_icmp1( 125 ; CHECK: icmp eq i64 %X, 0 126 define i1 @sdiv_icmp1(i64 %X) nounwind { 127 %A = sdiv exact i64 %X, 5 ; X/5 == 0 --> x == 0 128 %B = icmp eq i64 %A, 0 129 ret i1 %B 130 } 131 132 ; CHECK-LABEL: @sdiv_icmp2( 133 ; CHECK: icmp eq i64 %X, 5 134 define i1 @sdiv_icmp2(i64 %X) nounwind { 135 %A = sdiv exact i64 %X, 5 ; X/5 == 1 --> x == 5 136 %B = icmp eq i64 %A, 1 137 ret i1 %B 138 } 139 140 ; CHECK-LABEL: @sdiv_icmp3( 141 ; CHECK: icmp eq i64 %X, -5 142 define i1 @sdiv_icmp3(i64 %X) nounwind { 143 %A = sdiv exact i64 %X, 5 ; X/5 == -1 --> x == -5 144 %B = icmp eq i64 %A, -1 145 ret i1 %B 146 } 147 148 ; CHECK-LABEL: @sdiv_icmp4( 149 ; CHECK: icmp eq i64 %X, 0 150 define i1 @sdiv_icmp4(i64 %X) nounwind { 151 %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 152 %B = icmp eq i64 %A, 0 153 ret i1 %B 154 } 155 156 ; CHECK-LABEL: @sdiv_icmp5( 157 ; CHECK: icmp eq i64 %X, -5 158 define i1 @sdiv_icmp5(i64 %X) nounwind { 159 %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == -5 160 %B = icmp eq i64 %A, 1 161 ret i1 %B 162 } 163 164 ; CHECK-LABEL: @sdiv_icmp6( 165 ; CHECK: icmp eq i64 %X, 5 166 define i1 @sdiv_icmp6(i64 %X) nounwind { 167 %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == 5 168 %B = icmp eq i64 %A, -1 169 ret i1 %B 170 } 171 172
