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    Searched refs:AllocateReg (Results 1 - 11 of 11) sorted by null

  /external/llvm/lib/Target/Hexagon/
HexagonCallingConvLower.h 116 /// AllocateReg - Attempt to allocate one register. If it is not available,
119 unsigned AllocateReg(unsigned Reg) {
125 /// Version of AllocateReg with extra register to be shadowed.
126 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
133 /// AllocateReg - Attempt to allocate one of the specified registers. If none
136 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
147 /// Version of AllocateReg with list of registers to be shadowed.
148 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
HexagonVarargsCallingConvention.h 56 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
68 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
112 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
124 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
HexagonISelLowering.cpp 191 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
205 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
216 if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 2)) {
262 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) {
277 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
    [all...]
  /external/llvm/lib/Target/ARM/
ARMCallingConv.h 34 if (unsigned Reg = State.AllocateReg(RegList, 4))
49 if (unsigned Reg = State.AllocateReg(RegList, 4))
79 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2);
83 Reg = State.AllocateReg(GPRArgRegs, 4);
102 unsigned T = State.AllocateReg(LoRegList[i]);
129 unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
235 State.AllocateReg(SRegList[regNo]);
ARMISelLowering.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
CallingConvLower.h 307 /// AllocateReg - Attempt to allocate one register. If it is not available,
310 unsigned AllocateReg(unsigned Reg) {
316 /// Version of AllocateReg with extra register to be shadowed.
317 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
324 /// AllocateReg - Attempt to allocate one of the specified registers. If none
327 unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) {
363 /// Version of AllocateReg with list of registers to be shadowed.
364 unsigned AllocateReg(const MCPhysReg *Regs, const MCPhysReg *ShadowRegs,
395 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
  /external/llvm/lib/Target/Mips/
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp 371 CCInfo.AllocateReg(AMDGPU::VGPR0);
372 CCInfo.AllocateReg(AMDGPU::VGPR1);
377 CCInfo.AllocateReg(AMDGPU::SGPR0);
378 CCInfo.AllocateReg(AMDGPU::SGPR1);
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 329 unsigned Reg = State.AllocateReg(RegList, NbRegs);
    [all...]
  /external/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 60 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
71 if (unsigned Reg = State.AllocateReg(RegList, 6))
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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