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Searched
refs:AsRegister
(Results
1 - 6
of
6
) sorted by null
/art/compiler/utils/x86_64/
managed_register_x86_64.cc
63
Register low = AsRegisterPairLow().
AsRegister
();
64
Register high = AsRegisterPairHigh().
AsRegister
();
101
os << "CPU: " << static_cast<int>(AsCpuRegister().
AsRegister
());
constants_x86_64.h
34
Register
AsRegister
() const {
assembler_x86_64.h
175
CHECK_EQ(base.
AsRegister
(), RSP);
184
if (disp == 0 && base.
AsRegister
() != RBP) {
186
if (base.
AsRegister
() == RSP) {
191
if (base.
AsRegister
() == RSP) {
197
if (base.
AsRegister
() == RSP) {
206
CHECK_NE(index.
AsRegister
(), RSP); // Illegal addressing mode.
213
CHECK_NE(index.
AsRegister
(), RSP); // Illegal addressing mode.
214
if (disp == 0 && base.
AsRegister
() != RBP) {
assembler_x86_64.cc
28
return os << reg.
AsRegister
();
931
if (immediate.is_uint8() && reg.
AsRegister
() < 4) {
933
if (reg.
AsRegister
() == RAX) {
937
EmitUint8(0xC0 + reg.
AsRegister
());
940
} else if (reg.
AsRegister
() == RAX) {
[
all
...]
assembler_x86_64_test.cc
218
str << "set" << suffixes[i] << " %" << byte_regs[reg->
AsRegister
()] << "\n";
/art/compiler/optimizing/
code_generator_x86_64.cc
635
DCHECK_EQ(ret->GetLocations()->InAt(0).AsX86_64().AsCpuRegister().
AsRegister
(), RAX);
779
DCHECK_EQ(locations->InAt(0).AsX86_64().AsCpuRegister().
AsRegister
(),
780
locations->Out().AsX86_64().AsCpuRegister().
AsRegister
());
845
DCHECK_EQ(locations->InAt(0).AsX86_64().AsCpuRegister().
AsRegister
(),
846
locations->Out().AsX86_64().AsCpuRegister().
AsRegister
());
924
DCHECK_EQ(locations->InAt(0).AsX86_64().AsCpuRegister().
AsRegister
(),
925
locations->Out().AsX86_64().AsCpuRegister().
AsRegister
());
[
all
...]
Completed in 224 milliseconds