/external/llvm/lib/Target/X86/ |
X86AtomicExpandPass.cpp | 59 bool shouldExpandAtomicRMW(AtomicRMWInst *AI); 61 bool expandAtomicRMW(AtomicRMWInst *AI); 79 if (isa<AtomicRMWInst>(&Inst) || 89 if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(Inst)) 120 bool X86AtomicExpandPass::shouldExpandAtomicRMW(AtomicRMWInst *AI) { 130 AtomicRMWInst::BinOp Op = AI->getOperation(); 134 case AtomicRMWInst::Xchg: 135 case AtomicRMWInst::Add: 136 case AtomicRMWInst::Sub [all...] |
/external/llvm/lib/Transforms/Scalar/ |
LowerAtomic.cpp | 43 static bool LowerAtomicRMWInst(AtomicRMWInst *RMWI) { 53 case AtomicRMWInst::Xchg: 56 case AtomicRMWInst::Add: 59 case AtomicRMWInst::Sub: 62 case AtomicRMWInst::And: 65 case AtomicRMWInst::Nand: 68 case AtomicRMWInst::Or: 71 case AtomicRMWInst::Xor: 74 case AtomicRMWInst::Max: 78 case AtomicRMWInst::Min [all...] |
/external/llvm/lib/CodeGen/ |
AtomicExpandLoadLinkedPass.cpp | 45 bool expandAtomicRMW(AtomicRMWInst *AI); 73 if (isa<AtomicRMWInst>(&Inst) || isa<AtomicCmpXchgInst>(&Inst) || 84 if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(Inst)) 125 AtomicRMWInst *AI = 126 Builder.CreateAtomicRMW(AtomicRMWInst::Xchg, SI->getPointerOperand(), 134 bool AtomicExpandLoadLinked::expandAtomicRMW(AtomicRMWInst *AI) { 176 case AtomicRMWInst::Xchg: 179 case AtomicRMWInst::Add: 182 case AtomicRMWInst::Sub [all...] |
/external/llvm/lib/Transforms/Instrumentation/ |
ThreadSanitizer.cpp | 104 Function *TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1][kNumberOfAccessSizes]; 166 for (int op = AtomicRMWInst::FIRST_BINOP; 167 op <= AtomicRMWInst::LAST_BINOP; ++op) { 170 if (op == AtomicRMWInst::Xchg) 172 else if (op == AtomicRMWInst::Add) 174 else if (op == AtomicRMWInst::Sub) 176 else if (op == AtomicRMWInst::And) 178 else if (op == AtomicRMWInst::Or) 180 else if (op == AtomicRMWInst::Xor) 182 else if (op == AtomicRMWInst::Nand [all...] |
BoundsChecking.cpp | 184 isa<AtomicRMWInst>(I)) 200 } else if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(Inst)) {
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/external/llvm/lib/IR/ |
Instruction.cpp | 309 if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1)) 310 return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() && 311 RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() && 312 RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() && 313 RMWI->getSynchScope() == cast<AtomicRMWInst>(I2)->getSynchScope();
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AsmWriter.cpp | 715 AtomicRMWInst::BinOp Op) { 718 case AtomicRMWInst::Xchg: Out << " xchg"; break; 719 case AtomicRMWInst::Add: Out << " add"; break; 720 case AtomicRMWInst::Sub: Out << " sub"; break; 721 case AtomicRMWInst::And: Out << " and"; break; 722 case AtomicRMWInst::Nand: Out << " nand"; break; 723 case AtomicRMWInst::Or: Out << " or"; break; 724 case AtomicRMWInst::Xor: Out << " xor"; break; 725 case AtomicRMWInst::Max: Out << " max"; break; 726 case AtomicRMWInst::Min: Out << " min"; break [all...] |
Instructions.cpp | [all...] |
Core.cpp | [all...] |
/external/llvm/include/llvm/Analysis/ |
AliasAnalysis.h | 148 Location getLocation(const AtomicRMWInst *RMWI); 371 return getModRefInfo((const AtomicRMWInst*)I, Loc); 462 ModRefResult getModRefInfo(const AtomicRMWInst *RMW, const Location &Loc); 465 ModRefResult getModRefInfo(const AtomicRMWInst *RMW,
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/external/clang/lib/CodeGen/ |
CGAtomic.cpp | 310 llvm::AtomicRMWInst::BinOp Op = llvm::AtomicRMWInst::Add; 383 Op = llvm::AtomicRMWInst::Xchg; 391 Op = llvm::AtomicRMWInst::Add; 399 Op = llvm::AtomicRMWInst::Sub; 407 Op = llvm::AtomicRMWInst::And; 415 Op = llvm::AtomicRMWInst::Or; 423 Op = llvm::AtomicRMWInst::Xor; 430 Op = llvm::AtomicRMWInst::Nand; 436 llvm::AtomicRMWInst *RMWI [all...] |
CGBuiltin.cpp | 81 llvm::AtomicRMWInst::BinOp Kind, 114 llvm::AtomicRMWInst::BinOp Kind, [all...] |
CGExprScalar.cpp | [all...] |
/external/llvm/lib/Bitcode/Writer/ |
BitcodeWriter.cpp | 109 static unsigned GetEncodedRMWOperation(AtomicRMWInst::BinOp Op) { 112 case AtomicRMWInst::Xchg: return bitc::RMW_XCHG; 113 case AtomicRMWInst::Add: return bitc::RMW_ADD; 114 case AtomicRMWInst::Sub: return bitc::RMW_SUB; 115 case AtomicRMWInst::And: return bitc::RMW_AND; 116 case AtomicRMWInst::Nand: return bitc::RMW_NAND; 117 case AtomicRMWInst::Or: return bitc::RMW_OR; 118 case AtomicRMWInst::Xor: return bitc::RMW_XOR; 119 case AtomicRMWInst::Max: return bitc::RMW_MAX; 120 case AtomicRMWInst::Min: return bitc::RMW_MIN [all...] |
/frameworks/compile/slang/BitWriter_2_9_func/ |
BitcodeWriter.cpp | 105 static unsigned GetEncodedRMWOperation(AtomicRMWInst::BinOp Op) { 108 case AtomicRMWInst::Xchg: return bitc::RMW_XCHG; 109 case AtomicRMWInst::Add: return bitc::RMW_ADD; 110 case AtomicRMWInst::Sub: return bitc::RMW_SUB; 111 case AtomicRMWInst::And: return bitc::RMW_AND; 112 case AtomicRMWInst::Nand: return bitc::RMW_NAND; 113 case AtomicRMWInst::Or: return bitc::RMW_OR; 114 case AtomicRMWInst::Xor: return bitc::RMW_XOR; 115 case AtomicRMWInst::Max: return bitc::RMW_MAX; 116 case AtomicRMWInst::Min: return bitc::RMW_MIN [all...] |
/frameworks/compile/slang/BitWriter_3_2/ |
BitcodeWriter.cpp | 110 static unsigned GetEncodedRMWOperation(AtomicRMWInst::BinOp Op) { 113 case AtomicRMWInst::Xchg: return bitc::RMW_XCHG; 114 case AtomicRMWInst::Add: return bitc::RMW_ADD; 115 case AtomicRMWInst::Sub: return bitc::RMW_SUB; 116 case AtomicRMWInst::And: return bitc::RMW_AND; 117 case AtomicRMWInst::Nand: return bitc::RMW_NAND; 118 case AtomicRMWInst::Or: return bitc::RMW_OR; 119 case AtomicRMWInst::Xor: return bitc::RMW_XOR; 120 case AtomicRMWInst::Max: return bitc::RMW_MAX; 121 case AtomicRMWInst::Min: return bitc::RMW_MIN [all...] |
/external/llvm/lib/Target/CppBackend/ |
CPPBackend.cpp | [all...] |
/external/llvm/lib/Transforms/IPO/ |
MergeFunctions.cpp | 820 if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(L)) [all...] |
/external/llvm/lib/Analysis/ |
AliasAnalysis.cpp | 275 AliasAnalysis::getLocation(const AtomicRMWInst *RMWI) { 374 AliasAnalysis::getModRefInfo(const AtomicRMWInst *RMW, const Location &Loc) {
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/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | 169 static AtomicRMWInst::BinOp GetDecodedRMWOperation(unsigned Val) { 171 default: return AtomicRMWInst::BAD_BINOP; 172 case bitc::RMW_XCHG: return AtomicRMWInst::Xchg; 173 case bitc::RMW_ADD: return AtomicRMWInst::Add; 174 case bitc::RMW_SUB: return AtomicRMWInst::Sub; 175 case bitc::RMW_AND: return AtomicRMWInst::And; 176 case bitc::RMW_NAND: return AtomicRMWInst::Nand; 177 case bitc::RMW_OR: return AtomicRMWInst::Or; 178 case bitc::RMW_XOR: return AtomicRMWInst::Xor; 179 case bitc::RMW_MAX: return AtomicRMWInst::Max [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | 442 static AtomicRMWInst::BinOp GetDecodedRMWOperation(unsigned Val) { 444 default: return AtomicRMWInst::BAD_BINOP; 445 case bitc::RMW_XCHG: return AtomicRMWInst::Xchg; 446 case bitc::RMW_ADD: return AtomicRMWInst::Add; 447 case bitc::RMW_SUB: return AtomicRMWInst::Sub; 448 case bitc::RMW_AND: return AtomicRMWInst::And; 449 case bitc::RMW_NAND: return AtomicRMWInst::Nand; 450 case bitc::RMW_OR: return AtomicRMWInst::Or; 451 case bitc::RMW_XOR: return AtomicRMWInst::Xor; 452 case bitc::RMW_MAX: return AtomicRMWInst::Max [all...] |
/external/llvm/include/llvm/IR/ |
InstVisitor.h | 178 RetTy visitAtomicRMWInst(AtomicRMWInst &I) { DELEGATE(Instruction);}
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Instructions.h | 615 // AtomicRMWInst Class 618 /// AtomicRMWInst - an instruction that atomically reads a memory location, 622 class AtomicRMWInst : public Instruction { 625 AtomicRMWInst *clone_impl() const override; 664 AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val, 667 AtomicRMWInst(BinOp Operation, Value *Ptr, Value *Val, 754 struct OperandTraits<AtomicRMWInst> 755 : public FixedNumOperandTraits<AtomicRMWInst,2> { 758 DEFINE_TRANSPARENT_OPERAND_ACCESSORS(AtomicRMWInst, Value) [all...] |
/external/llvm/lib/AsmParser/ |
LLParser.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.h | 747 void visitAtomicRMW(const AtomicRMWInst &I);
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