| /external/clang/test/Parser/ |
| MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit)
8 mov eax, Bit
|
| /art/compiler/utils/arm/ |
| constants_arm.h | 145 BIC = 14, // Bit Clear
254 // Read one particular bit out of the instruction bits.
255 int Bit(int nr) const {
259 // Read a bit field out of the instruction bits.
289 int RegShiftField() const { return Bit(4); }
301 int BField() const { return Bit(22); }
302 int WField() const { return Bit(21); }
303 int LField() const { return Bit(20); }
311 int SignField() const { return Bit(6); }
312 int HField() const { return Bit(5);
[all...] |
| /external/chromium_org/v8/src/arm/ |
| constants-arm.h | 120 // Instr is merely used by the Assembler to distinguish 32bit integers
121 // representing instructions from usual 32 bit values.
122 // Instruction objects are pointers to 32bit values, and provide methods to
144 BIC = 14 << 21, // Bit Clear.
149 // The bits for bit 7-4 for some type 0 miscellaneous instructions.
196 // Instruction bit masks.
261 // Bit encoding P U W.
273 // Bit encoding P U W .
331 // svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for
332 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature
[all...] |
| constants-arm.cc | 25 high16 |= (0xff * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx.
26 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx.
27 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx.
|
| disasm-arm.cc | 96 // Each of these functions decodes one particular instruction type, a 3-bit
240 shift_names[instr->Bit(6) * 2],
329 // Print register list in ascending order, by scanning the bit mask.
364 (instr->Bit(24) == 0x0) &&
366 (instr->Bit(4) == 0x1)) {
368 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4);
451 if (instr->Bit(21) == 0) {
477 if (instr->Bit(21) == 0) {
479 // Bits 20-16 represent most-significant bit. Covert to width.
527 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &
[all...] |
| simulator-arm.cc | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| debug-arm64.cc | 156 DCHECK((scratch.Bit() & object_regs) == 0);
157 DCHECK((scratch.Bit() & non_object_regs) == 0);
233 Generate_DebugBreakCallHelper(masm, x1.Bit() | x3.Bit(), 0, x10);
241 Generate_DebugBreakCallHelper(masm, receiver.Bit() | name.Bit(), 0, x10);
251 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10);
267 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10)
[all...] |
| decoder-arm64-inl.h | 100 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level
102 DCHECK(instr->Bit(28) == 0x1);
122 if (instr->Bit(25) == 0) {
130 if (instr->Bit(25) == 0) {
131 if ((instr->Bit(24) == 0x1) ||
143 if (instr->Bit(25) == 0) {
144 if (instr->Bit(24) == 0) {
187 if ((instr->Bit(24) == 0x1) ||
216 if (instr->Bit(24) == 0) {
217 if (instr->Bit(28) == 0)
[all...] |
| /external/vixl/src/a64/ |
| decoder-a64.cc | 165 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level
167 VIXL_ASSERT(instr->Bit(28) == 0x1);
186 if (instr->Bit(25) == 0) {
194 if (instr->Bit(25) == 0) {
195 if ((instr->Bit(24) == 0x1) ||
207 if (instr->Bit(25) == 0) {
208 if (instr->Bit(24) == 0) {
251 if ((instr->Bit(24) == 0x1) ||
279 if (instr->Bit(24) == 0) {
280 if (instr->Bit(28) == 0)
[all...] |
| macro-assembler-a64.cc | 30 void MacroAssembler::B(Label* label, BranchType type, Register reg, int bit) {
32 ((bit == -1) || (type >= kBranchTypeFirstUsingBit)));
41 case reg_bit_clear: Tbz(reg, bit, label); break;
42 case reg_bit_set: Tbnz(reg, bit, label); break;
280 // 1. 64-bit move zero (movz).
281 // 2. 32-bit move inverted (movn).
282 // 3. 64-bit move inverted.
283 // 4. 32-bit orr immediate.
284 // 5. 64-bit orr immediate.
285 // Move-keep may then be used to modify each of the 16-bit half words
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMUnwindOpAsm.cpp | 77 for (uint32_t Bit = (1u << 5); Bit < (1u << 12); Bit <<= 1) {
78 if ((RegSave & Bit) == 0u)
81 Mask |= Bit;
111 uint32_t Bit = 1u << (i - 1);
112 if ((VFPRegSave & Bit) == 0u) {
120 Bit >>= 1;
122 while (i > 16 && (VFPRegSave & Bit)) {
125 Bit >>= 1
[all...] |
| /external/chromium_org/ppapi/native_client/tests/breakpad_crash_test/ |
| nacl.scons | 10 if env.Bit('host_windows') or env.Bit('host_mac'):
19 if env.Bit('host_windows') and env.Bit('build_x86_64'):
48 env.Bit('host_linux') or env.Bit('host_mac') or
49 env.Bit('running_on_valgrind')))
69 # env.Bit('running_on_valgrind'))
85 # # This test is currently flaky on Win 32 bit on x86, disabling there.
88 # env.Bit('running_on_valgrind') o
[all...] |
| /external/chromium_org/ppapi/native_client/src/untrusted/irt_stub/ |
| nacl.scons | 19 if not env.Bit('nacl_disable_shared'):
21 if env.Bit('bitcode'):
|
| /art/compiler/dex/quick/ |
| resource_mask.cc | 32 ResourceMask::Bit(ResourceMask::kFPStatus),
33 ResourceMask::Bit(ResourceMask::kCCode),
35 // The 127-bit is the same as CLZ(masks_[1]) for a ResourceMask with only that bit set.
43 ResourceMask::Bit(ResourceMask::kFPStatus)), check_kNoRegMasks_fp_status_index);
45 ResourceMask::Bit(ResourceMask::kCCode)), check_kNoRegMasks_ccode_index);
49 return ResourceMask::Bit(reg).Union(ResourceMask::Bit(special_bit));
63 DEFINE_LIST_32(ResourceMask::Bit),
76 // The 127-bit is the same as CLZ(masks_[1]) for a ResourceMask with only that bit set
[all...] |
| resource_mask.h | 42 * Def/Use encoding in 128-bit use_mask/def_mask. Low positions used for target-specific
75 static constexpr ResourceMask Bit(size_t bit) {
76 return ResourceMask(bit >= 64u ? 0u : UINT64_C(1) << bit,
77 bit >= 64u ? UINT64_C(1) << (bit - 64u) : 0u);
83 DCHECK_CONSTEXPR((start_bit & 1u) == 0u, << start_bit << " isn't even", Bit(0))
116 void SetBit(size_t bit) {
117 DCHECK_LE(bit, kHighestCommonResource)
[all...] |
| /external/chromium_org/ppapi/native_client/ |
| chrome_main.scons | 72 if env.Bit('browser_headless') and env.Bit('host_linux'):
112 if env.Bit('mac'):
116 if allow_64bit_redirect and env.Bit('target_x86_64'):
117 # On 64-bit Windows and on Mac, we need the 32-bit plugin because
118 # the browser is 32-bit.
119 # Unfortunately it is tricky to build the 32-bit plugin (and all the
120 # libraries it needs) in a 64-bit build... so we'll assume it has already
123 if env.Bit('windows')
[all...] |
| /external/chromium_org/ppapi/native_client/tests/nacl_browser/inbrowser_test_runner/ |
| nacl.scons | 48 env.Bit('running_on_valgrind') or
49 # inbrowser_test_runner_parallel is flaky on 32 bit windows
53 if not env.Bit('tests_use_irt'):
|
| /external/chromium_org/ppapi/native_client/tests/nacl_browser/browser_dynamic_library/ |
| nacl.scons | 10 if env.Bit('nacl_static_link'):
|
| /external/llvm/lib/TableGen/ |
| TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List,
|
| Record.cpp | 104 if (BI->getNumBits() != 1) return nullptr; // Only accept if just one bit!
110 if (Val != 0 && Val != 1) return nullptr; // Only accept 0 or 1 for a bit!
118 return VI; // Accept variable if it is already of bit type!
154 if (Size != 1) return nullptr; // Can only convert single bit.
219 if (BitInit *Bit = dyn_cast<BitInit>(BI->getBit(i))) {
220 Result |= Bit->getValue() << i;
495 if (Init *Bit = getBit(e-i-1))
496 Result += Bit->getAsString();
503 // Fix bit initializer to preserve the behavior that bit reference from a unse
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | 140 /// BitRecTy - 'bit' - Represent a single bit
169 std::string getAsString() const override { return "bit"; }
430 /// We could pack these a bit tighter by not having the IK_FirstXXXInit
498 /// the bit subscript operator on this initializer, return null.
542 /// bit.
543 virtual Init *getBit(unsigned Bit) const = 0;
545 /// getBitVar - This method is used to retrieve the initializer for bit
549 /// getBitNum - This method is used to retrieve the bit number of a bit
[all...] |
| /external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
| complex_bit_reverse_arm.S | 13 @ Reference C code is in file complex_bit_reverse.c. Bit-exact.
87 @ The index tables. Note the values are doubles of the actual indexes for 16-bit
|
| /external/chromium_org/ppapi/native_client/tests/nacl_browser/fault_injection/ |
| nacl.scons | 86 env.Bit('nacl_glibc')))
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/macho/tests/nasm64/ |
| machotest64.asm | 24 ; [18] Perform a 64 Bit relocation in the text section
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
| classpnp.h | 156 #define SET_FLAG(Flags, Bit) ((Flags) |= (Bit))
157 #define CLEAR_FLAG(Flags, Bit) ((Flags) &= ~(Bit))
158 #define TEST_FLAG(Flags, Bit) (((Flags) & (Bit)) != 0)
|
