| /external/llvm/lib/Target/X86/ |
| X86CallingConv.h | 25 CCState &) {
|
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 10 // This file implements the CCState class, used for lowering and implementing
26 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
42 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
59 void CCState::MarkAllocated(unsigned Reg) {
67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.h | 30 CCState &State, bool CanFail) {
61 CCState &State) {
73 CCState &State, bool CanFail) {
115 CCState &State) {
125 CCValAssign::LocInfo &LocInfo, CCState &State) {
147 CCState &State) {
158 CCState &State) {
178 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
|
| ARMISelLowering.h | 506 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
517 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
523 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
534 void HandleByVal(CCState *, unsigned &, unsigned) const override;
|
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | 70 class ARMCCState : public CCState {
75 : CCState(CC, isVarArg, MF, TM, locs, C) {
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 10 // This file declares the CCState and CCValAssign classes, used for lowering
25 class CCState;
155 ISD::ArgFlagsTy ArgFlags, CCState &State);
162 ISD::ArgFlagsTy &ArgFlags, CCState &State);
169 /// CCState - This class holds information needed while lowering arguments and
172 class CCState {
240 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 49 class HexagonCCState : public CCState {
56 : CCState(CC, isVarArg, MF, TM, locs, C),
67 ISD::ArgFlagsTy ArgFlags, CCState &State);
72 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
82 ISD::ArgFlagsTy ArgFlags, CCState &State);
87 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
97 ISD::ArgFlagsTy ArgFlags, CCState &State) {
147 ISD::ArgFlagsTy ArgFlags, CCState &State)
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 266 static void AnalyzeVarArgs(CCState &State,
271 static void AnalyzeVarArgs(CCState &State,
281 static void AnalyzeArguments(CCState &State,
346 static void AnalyzeRetResult(CCState &State,
351 static void AnalyzeRetResult(CCState &State,
357 static void AnalyzeReturnValues(CCState &State,
440 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
535 // CCState - Info about the registers and stack slot.
536 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
586 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction()
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 356 MipsCC(CallingConv::ID CallConv, bool IsO32, bool IsFP64, CCState &Info,
375 const CCState &getCCInfo() const { return CCInfo; }
428 CCState &CCInfo;
|
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 683 CCState &State);
689 CCState &State);
695 CCState &State);
|
| PPCFastISel.cpp | [all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.h | 101 void AnalyzeFormalArguments(CCState &State,
|
| AMDGPUISelLowering.cpp | 77 ISD::ArgFlagsTy ArgFlags, CCState &State) {
482 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State,
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State)
54 ISD::ArgFlagsTy &ArgFlags, CCState &State)
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
192 // CCState - Info about the registers and stack slot.
193 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
252 // CCState - Info about the registers and stack slot.
253 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
352 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
552 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction()
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 371 void saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
|
| AArch64FastISel.cpp | [all...] |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | 505 /// \brief Similar to llvm::CCState, but for Clang.
506 struct CCState {
507 CCState(unsigned CC) : CC(CC), FreeRegs(0) {}
537 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
539 ABIArgInfo getIndirectReturnResult(CCState &State) const;
545 ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
546 ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
547 bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const;
659 ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const {
669 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, CCState &State) const
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 44 class CCState;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs,
785 static bool canUseSiblingCall(CCState ArgCCInfo,
820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs,
[all...] |
