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    Searched refs:CP0_TCStatus (Results 1 - 3 of 3) sorted by null

  /external/qemu/target-mips/
op_helper.c 681 CP0_TCStatus registers. These fields are wired to the same registers,
713 tcst = &cpu->active_tc.CP0_TCStatus;
715 tcst = &cpu->tcs[tc].CP0_TCStatus;
723 /* Called for updates to CP0_TCStatus. */
764 tcst = &cpu->active_tc.CP0_TCStatus;
766 tcst = &cpu->tcs[tc].CP0_TCStatus;
796 return env->active_tc.CP0_TCStatus;
805 return other->active_tc.CP0_TCStatus;
807 return other->tcs[other_tc].CP0_TCStatus;
    [all...]
machine.c 21 qemu_put_sbe32s(f, &tc->CP0_TCStatus);
168 qemu_get_sbe32s(f, &tc->CP0_TCStatus);
cpu.h 155 int32_t CP0_TCStatus;
462 uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */

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