| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 153 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
154 setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
155 setLoadExtAction(ISD::EXTLOAD, MVT::i16, Custom);
156 setLoadExtAction(ISD::EXTLOAD, MVT::i32, Expand);
157 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
[all...] |
| AMDGPUISelLowering.cpp | 217 setLoadExtAction(ISD::EXTLOAD, MVT::v2i8, Expand);
220 setLoadExtAction(ISD::EXTLOAD, MVT::v4i8, Expand);
223 setLoadExtAction(ISD::EXTLOAD, MVT::v2i16, Expand);
226 setLoadExtAction(ISD::EXTLOAD, MVT::v4i16, Expand);
[all...] |
| R600ISelLowering.cpp | 120 // EXTLOAD should be the same as ZEXTLOAD. It is legal for some address
126 setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
127 setLoadExtAction(ISD::EXTLOAD, MVT::i16, Custom);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 276 // Only do this if the target has a native EXTLOAD instruction from
278 TLI.isLoadExtLegal(ISD::EXTLOAD, SVT) &&
291 DAG.getExtLoad(ISD::EXTLOAD, dl, OrigVT,
378 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
493 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr,
589 // with a "move to register" or "extload into register" instruction, then
[all...] |
| SelectionDAGDumper.cpp | 461 case ISD::EXTLOAD: OS << ", anyext"; break;
|
| LegalizeVectorOps.cpp | 490 ScalarLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, WideVT, Chain, BasePTR,
540 case ISD::EXTLOAD:
[all...] |
| DAGCombiner.cpp | 182 void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad);
192 SDValue Trunc, SDValue ExtLoad, SDLoc DL,
810 void DAGCombiner::ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad) {
813 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, VT, SDValue(ExtLoad, 0));
822 DAG.ReplaceAllUsesOfValueWith(SDValue(Load, 1), SDValue(ExtLoad, 1));
835 : ISD::EXTLOAD)
[all...] |
| LegalizeIntegerTypes.cpp | 447 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAG.cpp | 238 case ISD::EXTLOAD:
[all...] |
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 518 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, MemVT.getSimpleVT());
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 130 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
467 SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 225 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
230 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
380 setLoadExtAction(ISD::EXTLOAD, MVT::i32, Custom);
[all...] |
| MipsSEISelLowering.cpp | 57 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT0, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 308 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
309 setLoadExtAction(ISD::EXTLOAD, MVT::f64, Expand);
310 setLoadExtAction(ISD::EXTLOAD, MVT::f80, Expand);
460 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT, Expand);
525 setLoadExtAction(ISD::EXTLOAD, VT.getSimpleVT(), Expand);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 223 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
278 setLoadExtAction(ISD::EXTLOAD, MVT::f80, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 83 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86ISelDAGToDAG.cpp | 529 // FPStack has extload and truncstore. SSE can fold direct loads into other
545 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp,
550 // extload we created. This will cause general havok on the dag because
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 199 // Turn FP extload into load/fextend
200 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 478 setLoadExtAction(ISD::EXTLOAD, VT, Expand);
[all...] |
