| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 252 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
256 EXTRACT_VECTOR_ELT,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 184 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
368 LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
370 RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
416 case ISD::EXTRACT_VECTOR_ELT:
[all...] |
| LegalizeTypesGeneric.cpp | 119 Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
218 // The result of EXTRACT_VECTOR_ELT may be larger than the element type of
235 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
239 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
|
| LegalizeVectorOps.cpp | 618 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
[all...] |
| SelectionDAGDumper.cpp | 198 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
|
| LegalizeIntegerTypes.cpp | 66 case ISD::EXTRACT_VECTOR_ELT:
377 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NVT, N->getOperand(0),
[all...] |
| LegalizeFloatTypes.cpp | 68 case ISD::EXTRACT_VECTOR_ELT:
139 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | 491 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
518 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
552 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
[all...] |
| DAGCombiner.cpp | 172 /// \brief Replace an ISD::EXTRACT_VECTOR_ELT of a load with a narrowed
175 /// \param EVE ISD::EXTRACT_VECTOR_ELT to be replaced.
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 140 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i32, Custom);
141 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f32, Custom);
142 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Custom);
143 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);
152 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
572 case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG);
767 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
769 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
771 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
773 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2)
[all...] |
| SIISelLowering.cpp | 189 case ISD::EXTRACT_VECTOR_ELT:
[all...] |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.cpp | 374 if (ISD == ISD::EXTRACT_VECTOR_ELT ||
|
| PPCISelLowering.cpp | 453 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand);
539 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Legal);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 117 /// lowering EXTRACT_VECTOR_ELT operations easier.
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 103 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 253 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Ty, Custom);
302 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Ty, Legal);
372 case ISD::EXTRACT_VECTOR_ELT: return lowerEXTRACT_VECTOR_ELT(Op, DAG);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 509 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT.getSimpleVT(), Custom);
[all...] |
| AArch64ISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
