/external/valgrind/main/none/tests/mips64/ |
macro_int.h | 53 unsigned long long HI; \ 63 : "=r" (HI), "=r" (LO) \ 67 printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \ 68 instruction, (long long) RSval, (long long) RTval, HI, LO); \ 73 unsigned long long HI; \ 83 : "=r" (HI), "=r" (LO) \ 87 printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \ 88 instruction, (long long) RSval, (long long) RTval, HI, LO); \
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/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfAccelTable.cpp | 146 for (HashList::const_iterator HI = Buckets[i].begin(), 148 HI != HE; ++HI) { 150 Asm->EmitInt32((*HI)->HashValue); 161 for (HashList::const_iterator HI = Buckets[i].begin(), 163 HI != HE; ++HI) { 167 MCSymbolRefExpr::Create((*HI)->Sym, Context), 180 for (HashList::const_iterator HI = Buckets[i].begin(), 182 HI != HE; ++HI) [all...] |
AsmPrinter.cpp | 372 for (const HandlerInfo &HI : Handlers) { 373 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled); 374 HI.Handler->setSymbolSize(GVSym, Size); 546 for (const HandlerInfo &HI : Handlers) { 547 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled); 548 HI.Handler->beginFunction(MF); 760 for (const HandlerInfo &HI : Handlers) { 761 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/ |
endian.h | 53 # define __LONG_LONG_PAIR(HI, LO) LO, HI 55 # define __LONG_LONG_PAIR(HI, LO) HI, LO
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/ |
endian.h | 53 # define __LONG_LONG_PAIR(HI, LO) LO, HI 55 # define __LONG_LONG_PAIR(HI, LO) HI, LO
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/external/pcre/dist/sljit/ |
sljitNativePPC_common.c | 129 #define HI(opcode) ((opcode) << 26) 132 #define ADD (HI(31) | LO(266)) 133 #define ADDC (HI(31) | LO(10)) 134 #define ADDE (HI(31) | LO(138)) 135 #define ADDI (HI(14)) 136 #define ADDIC (HI(13)) 137 #define ADDIS (HI(15)) 138 #define ADDME (HI(31) | LO(234)) 139 #define AND (HI(31) | LO(28)) 140 #define ANDI (HI(28) [all...] |
sljitNativeMIPS_common.c | 93 #define HI(opcode) ((opcode) << 26) 98 #define ABS_S (HI(17) | FMT_S | LO(5)) 99 #define ADD_S (HI(17) | FMT_S | LO(0)) 100 #define ADDIU (HI(9)) 101 #define ADDU (HI(0) | LO(33)) 102 #define AND (HI(0) | LO(36)) 103 #define ANDI (HI(12)) 104 #define B (HI(4)) 105 #define BAL (HI(1) | (17 << 16)) 106 #define BC1F (HI(17) | (8 << 21) [all...] |
/external/qemu/distrib/sdl-1.2.15/src/video/ |
SDL_blit_1.c | 71 #define HI 1 74 #define HI 0 124 (map[src[HI]]<<16)|(map[src[LO]]); 128 (map[src[HI]]<<16)|(map[src[LO]]); 139 (map[src[HI]]<<16)|(map[src[LO]]); 156 (map[src[HI]]<<16)|(map[src[LO]]); 160 (map[src[HI]]<<16)|(map[src[LO]]); 171 (map[src[HI]]<<16)|(map[src[LO]]);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMBaseInfo.h | 38 HI, // Unsigned higher Greater than, or unordered 58 case HI: return LS; 59 case LS: return HI; 78 case ARMCC::HI: return "hi";
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/external/aac/libSBRenc/src/ |
sbr_def.h | 155 #define HI 1
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sbr_encoder.cpp | 638 if (hSbrElement->sbrConfigData.freqBandTable[HI]) 639 FreeRam_Sbr_freqBandTableHI(&hSbrElement->sbrConfigData.freqBandTable[HI]); 737 sbrConfigData->freqBandTable[HI], 738 &sbrConfigData->nSfb[HI], 750 sbrConfigData->freqBandTable[HI], 751 sbrConfigData->nSfb[HI] 780 sbrConfigData->freqBandTable[HI][0], 790 hEnv->sbrCodeNoiseFloor.nSfb[HI] = hEnv->TonCorr.sbrNoiseFloorEstimate.noNoiseBands; 793 hEnv->sbrCodeEnvelope.nSfb[HI] = sbrConfigData->nSfb[HI]; [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTX.h | 166 HI,
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/external/clang/test/Sema/ |
attr-mode.c | 8 typedef int i16_1 __attribute((mode(HI)));
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/external/chromium_org/third_party/boringssl/linux-arm/crypto/sha/ |
sha512-armv4.S | 5 # define HI 4 8 # define HI 0 80 ldr r8,[r0,#32+HI] 82 ldr r10, [r0,#48+HI] 84 ldr r12, [r0,#56+HI] 91 ldr r6,[r0,#0+HI] 93 ldr r4,[r0,#8+HI] 95 ldr r10, [r0,#16+HI] 97 ldr r12, [r0,#24+HI] 105 ldr r4,[r0,#40+HI] [all...] |
/external/openssl/crypto/sha/asm/ |
sha512-armv4.S | 4 # define HI 4 7 # define HI 0 78 ldr r8,[r0,#32+HI] 80 ldr r10, [r0,#48+HI] 82 ldr r12, [r0,#56+HI] 89 ldr r6,[r0,#0+HI] 91 ldr r4,[r0,#8+HI] 93 ldr r10, [r0,#16+HI] 95 ldr r12, [r0,#24+HI] 103 ldr r4,[r0,#40+HI] [all...] |
sha512-armv4.pl | 37 $hi="HI"; 76 @ LO lo>>14^hi<<18 ^ lo>>18^hi<<14 ^ hi>>9^lo<<23 77 @ HI hi>>14^lo<<18 ^ hi>>18^lo<<14 ^ lo>>9^hi<<23 85 ldr $t3,[sp,#$Hoff+4] @ h.hi [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonSplitConst32AndConst64.cpp | 1 //=== HexagonSplitConst32AndConst64.cpp - split CONST32/Const64 into HI/LO ===// 12 // appropriate LO and HI instructions. This splitting is done by this pass. 15 // register to the result of LO and HI instructions. This pass is always 95 TII->get(Hexagon::HI), DestReg).addOperand(Symbol);
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/lib/gcc/x86_64-linux/4.6/gcov-src/ |
gcov-io.h | 268 typedef unsigned gcov_unsigned_t __attribute__ ((mode (HI))); 269 typedef unsigned gcov_position_t __attribute__ ((mode (HI))); 275 typedef signed gcov_type __attribute__ ((mode (HI))); 283 typedef signed gcov_type __attribute__ ((mode (HI))); [all...] |
/external/linux-tools-perf/perf-3.12.0/arch/hexagon/lib/ |
memcpy.S | 156 #define dataF8 R11:10 /* hi 8 bytes of non-aligned transfer */ 229 mask.h = #HI(0x7fffffff); 242 r31.h = #HI(.Lmemcpy_return); /* set up final return pointer */
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/external/valgrind/main/VEX/auxprogs/ |
genoffsets.c | 227 GENOFFSET(MIPS32,mips32,HI); 264 GENOFFSET(MIPS64,mips64,HI);
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/system/core/libpixelflinger/tests/arch-arm64/assembler/ |
arm64_assembler_test.cpp | 120 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV, 128 "HI", "LS","GE","LT", "GT", "LE", "AL", "NV" 217 {0xA036,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x00000,0,0,NA,0,0,1,HI}, 225 {0xA044,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x00000,SHIFT_LSR,31,NA,0,0,1,HI}, 233 {0xA052,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x10000,SHIFT_ASR,1,NA,0,0,1,HI}, 396 {0xB031,INSTR_STRH,HI,LS,1,4066,0xDEADBEEFDEADBEEF,4070,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,4070,1,4066,8,0xDEADBEEFDEADBEEF}, 398 {0xB033,INSTR_STRH,LS,HI,1,4066,0xDEADBEEFDEADBEEF,4070,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,4070,1,4066,8,0xDEADBEEFDEADBEEF}, 399 {0xB034,INSTR_STRH,HI,HI,1,4066,0xDEADBEEFDEADBEEF,4070,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,4070,1,4066,8,0xDEAD6789DEADBEEF}, [all...] |
asm_test_jacket.S | 99 //HI - (C==1) && (Z==0) 204 csel w2, w1, w0, HI
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/art/compiler/utils/arm/ |
constants_arm.h | 114 HI = 8, // unsigned higher
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/external/chromium_org/third_party/boringssl/src/crypto/sha/asm/ |
sha512-armv4.pl | 54 $hi="HI"; 93 @ LO lo>>14^hi<<18 ^ lo>>18^hi<<14 ^ hi>>9^lo<<23 94 @ HI hi>>14^lo<<18 ^ hi>>18^lo<<14 ^ lo>>9^hi<<23 102 ldr $t3,[sp,#$Hoff+4] @ h.hi [all...] |
/external/llvm/lib/Target/NVPTX/InstPrinter/ |
NVPTXInstPrinter.cpp | 183 case NVPTX::PTXCmpMode::HI: 184 O << ".hi";
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