| /external/valgrind/main/VEX/priv/ |
| host_generic_regs.c | 47 case HRcInt64: vex_printf("HRcInt64"); break;
63 case HRcInt64: vex_printf("%%%sR%d", maybe_v, regNo); return;
|
| host_generic_regs.h | 88 HRcInt64 64 bits
102 HRcInt64=4, /* 64-bit int */
|
| host_arm64_defs.c | 59 case HRcInt64:
84 HReg hregARM64_X0 ( void ) { return mkHReg(0, HRcInt64, False); }
85 HReg hregARM64_X1 ( void ) { return mkHReg(1, HRcInt64, False); }
86 HReg hregARM64_X2 ( void ) { return mkHReg(2, HRcInt64, False); }
87 HReg hregARM64_X3 ( void ) { return mkHReg(3, HRcInt64, False); }
88 HReg hregARM64_X4 ( void ) { return mkHReg(4, HRcInt64, False); }
89 HReg hregARM64_X5 ( void ) { return mkHReg(5, HRcInt64, False); }
90 HReg hregARM64_X6 ( void ) { return mkHReg(6, HRcInt64, False); }
91 HReg hregARM64_X7 ( void ) { return mkHReg(7, HRcInt64, False); }
93 HReg hregARM64_X9 ( void ) { return mkHReg(9, HRcInt64, False);
[all...] |
| host_amd64_defs.c | 60 case HRcInt64:
94 case HRcInt64:
104 HReg hregAMD64_RAX ( void ) { return mkHReg( 0, HRcInt64, False); }
105 HReg hregAMD64_RCX ( void ) { return mkHReg( 1, HRcInt64, False); }
106 HReg hregAMD64_RDX ( void ) { return mkHReg( 2, HRcInt64, False); }
107 HReg hregAMD64_RBX ( void ) { return mkHReg( 3, HRcInt64, False); }
108 HReg hregAMD64_RSP ( void ) { return mkHReg( 4, HRcInt64, False); }
109 HReg hregAMD64_RBP ( void ) { return mkHReg( 5, HRcInt64, False); }
110 HReg hregAMD64_RSI ( void ) { return mkHReg( 6, HRcInt64, False); }
111 HReg hregAMD64_RDI ( void ) { return mkHReg( 7, HRcInt64, False);
[all...] |
| host_arm64_isel.c | 150 HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True/*virtual reg*/);
849 toBool( hregClass(am->ARM64am.RI9.reg) == HRcInt64
857 toBool( hregClass(am->ARM64am.RI12.reg) == HRcInt64
865 toBool( hregClass(am->ARM64am.RR.base) == HRcInt64
867 && hregClass(am->ARM64am.RR.index) == HRcInt64
[all...] |
| host_s390_isel.c | 221 HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True /* virtual */ );
244 return mkHReg(regno, HRcInt64, False /* virtual */ );
[all...] |
| host_amd64_isel.c | 196 HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True/*virtual reg*/);
266 toBool( hregClass(am->Aam.IR.reg) == HRcInt64
271 toBool( hregClass(am->Aam.IRRS.base) == HRcInt64
273 && hregClass(am->Aam.IRRS.index) == HRcInt64
313 vassert(hregClass(src) == HRcInt64);
314 vassert(hregClass(dst) == HRcInt64);
907 vassert(hregClass(r) == HRcInt64);
[all...] |
| host_s390_defs.c | 94 case HRcInt64: vex_sprintf(buf, "%%vR%d", r); break;
105 case HRcInt64: return ireg_names[r];
136 (*arr)[i++] = mkHReg(1, HRcInt64, False);
137 (*arr)[i++] = mkHReg(2, HRcInt64, False);
138 (*arr)[i++] = mkHReg(3, HRcInt64, False);
139 (*arr)[i++] = mkHReg(4, HRcInt64, False);
140 (*arr)[i++] = mkHReg(5, HRcInt64, False);
141 (*arr)[i++] = mkHReg(6, HRcInt64, False);
142 (*arr)[i++] = mkHReg(7, HRcInt64, False);
143 (*arr)[i++] = mkHReg(8, HRcInt64, False)
[all...] |
| host_mips_defs.c | 46 mkHReg(_n, _mode64 ? HRcInt64 : HRcInt32, False)
83 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 ||
93 case HRcInt64:
[all...] |
| host_mips_isel.c | 59 #define HRcGPR(__mode64) (__mode64 ? HRcInt64 : HRcInt32)
328 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64);
[all...] |
| host_ppc_isel.c | 48 #define HRcGPR(__mode64) (__mode64 ? HRcInt64 : HRcInt32)
484 hregClass(r_src) == HRcInt64);
562 vassert(hregClass(r_src) == HRcInt64);
[all...] |
| host_ppc_defs.c | 66 case HRcInt64:
93 mkHReg(_n, _mode64 ? HRcInt64 : HRcInt32, False)
[all...] |
